MPU/SoC/Application Processor/Embedded OS

Everything has its principles and mechanisms which are designed by its creator and followed by its users.

• Embedded Platform Architecture
• The key to understanding how the software interacts with the underlying platform devices is the system memory map and the associated register maps of the devices.
• Some devices are directly visible to software and mapped to physical addresses in the processor's address space, and other devices are attached over a bus, which introduces a level of indirection when we wish to access the device registers.
• SoC devices incorporate as many of the key peripherals your application needs.
• The other speical processor(controller) run special software which often is called as firmware, with robust quality of special service.
• The key capabilites required to support the execution of a multitasking OS on the processor are as follows:
  1. A memory subsystem for intial instruction storage and random access memory
  2. An interrupt controller to gather, prioritize, and control generation of interrupts to the processor
  3. A timer; multitasking OS typcially rely on at least on timer interrupt to trigger the OS's scheduler
  4. Access to I/O devices, suchas graphics controllers, network interfaces, and mouse/keypads.
• The location of the devices are presented through the memory map.
• When the processor generates a read or write, the address is decoded by the system memory address decoders and is eventually routed to the appropriate physical device to complete the transaction.
• When the OS timer/System Tick expires, the OS's scheduler is executed.
• All OS make use of at least one timer called the system tick. This timer is used to trigger timer callback functions and provide the time base to support time slicing of tasks by the OS.
• The driver must perform buffer copies between user mapped buffer and an allocated kernel buffer.
• EABI(Embedded Application Binary Interface) defines the conventions for files, data types, register mapping, stack frame and parameter passing rules.
• The memory associated with the display is known as the frame buffer. In embedded systems the frame buffer is usually allocated from system memory. The display controller copies the the contents from the memory every frame(for example 30 times per second) and output to the display across one of the many physical interface standards.
• An OS provides multiplexed access to shared resources that include peripherals, cpu, and memory. The OS provides mechanisms to interact with services through an API. It provides memory management, thread synchronization primitives, and time of day services.
• OS Service Call Design Pattern:

1. 1. Each service call has a user space library wrapper providing a function for each call.
   2. Each service call is assigned an OS service ID in the form of an integer. These OS service call IDs are maintained by OS. Just like uuid and vtbl in COM.So it could not break existing application or libraries, that is, it would break backward compatibility.
   3. The service wapper call pushes the calling arguments on to the stack, loas register( EAX) with Service Call ID, and issue a service trap or software interrupt depending on the target processor architecture.
   4. The trap is an instruction that causes tranition from the current user space execution to the function in the exception vector table.
   5. The OS services trap handler dereferences a system call table using the service call ID and tranfers control to the function bound to the table slot.
   6. At this point, the processor is executing the kernel system call function with kernel privileges.

• An initial root task or thread is created by the kernel. Launcher at Android, Exploer.exe in Windows.The kernel root task starts with the highest privileges. The root task subsequently creates a number of other task and then deletes itself.
• The kernel is the program that performs the most basic functions of an operating system: It controls and interface with the computer's hardware, handles allocation of memory and other resources, allows multiple programs to run at the same time( via sheduler triggered by SysTimer ), manages the file system, and so on.
• The kernel by itself doesn't provide features that are useful to users. It can't even provide a simple prompt for uers to enter basic commands. It provides no way for users to manage or edit files, communicate with other computers, or write other programs. These tasks require the use of a wide array of other programs, including command shells, file utilities, editors, and compilers. Many of these programs, in turn, use libraries of general-purpose functions, such as the library containing standard C libray functions, which are not included in the kernel.
• On GNU/Linux systems, many of these other programs and libraries are sofware developed as part of the GNU Project. A great deal of this software predates the Linux Kernel. The aim of the GNU Project is "to develop a complete UNIX-like OS which is free software".
• System Memory Map

1. • The memory map is a list of physical addresses of all the resources on the platform, such as the DRAM memory, the interrupt controllers, and I/O devices.The system memory map is generated from the point of view of the processor.
   • When the processor generates a read or write, the address is decoded by the system memory address decoders and is eventually routed to the appropriate physical device to complete the transaction, such as hareware controller registers or data registers.
   • There are two splited separate sub ranges,.The first is the address range that when decoded accesses the DRAM, and the second is arange of address that are decoded to select I/O devices, which are called as Main Memory Range and Memory Mapped I/O Range.
   • The Memory Mapped I/O Range actually is further divided into subregions: Fixed Address Memory Mapped Address, such as flash device, timers controller, interrupt controller; PCIe BUS, such as Gfx Controller, USB controller, Ethernet Device, Wireless 802.11

• Interrupt Controller
  • The processor requires the ability to interact with its environment through a range of input and output devices. The devices usually require a prompt response from the processor in order to service a real world event.
  • The interrupt controller is a component that gathers all the hardware interrupt events from the SoC and platform and then presents the events to the processor.
  • At its fundamental level, the interrupt controller routes events to the processor core for action. The interrupt controller facilitates the identification of the event that caused the interrupt so that the exception processing mechanism of the processor can transfer control to the appropriate handling function.
  • It consists of three registers that can be read from or written to from the processor. The registers are composed of bit fields with a single bit allocated for each interrupt source within each register.
  • When the interrupt handler comes to service the interrupt, the handler must write a logic one to the bit it wishes to acknowledge. Bits with this behavior within a device register are known as Write One to Clear.
  • The first mechanism, the interrupt software handler reads the register, the register value is used as an index into a software-based vector table containing function pointers. Such as ARM devices where the architecture defines a single interrupt request line into the processor.
  • The second mechanism used is one in which the CPU hardware itself generates an interrupt acknowledge cycle that automatcially retrieves the interrupt number when the interrupt request has been raised to the processor. This interrupt number is then translated to the interrupt vector that the processor will transfer control to.
• This mechanism of using a few memory-mapped registers to access a larger bank of internal device registers is a common design pattern used in IA-32 systems.
• Hardware-based timers are critical to all computer systems. A hardware-based timer generally consists of a hardware counter that counts down from a provisioned value and triggers an event such as an interrupt to the CPU when the counter reached zero.
• At least on timer is required for the OS, particularly if it is a preemptive OS. The OS timer is often called OS tick. The interrupt handler for OS tick triggers  the OS scheduler to evaluate whether the current process should be suspended in favour of executing another ready task.
• The Timer in embedded OS will invole Clock Source, Timer accuracy, Free Run/One Shot, Count direction, Counters, Watchdog timers,
• Memory
  • A compplete embedded system is composed of many different memory technologies.
  • Intel SoC have two distinct address types.The first is for I/O devices; this is read using either IN/OUT assembly instuctions or, more likely using normal MOV instuctions to a dedicated part of the address map known as memory-mapped I/O space(MMIO). When a program reads to an MMIO space it is routed to a device.
  • The other key address space is memory. The memory space is mapped to memory deivces on the SoC, such as the DRAM, a flash ROM device, or local on-die SRAM memory.
  • The hardware block that converts internal memory transactions to access the memory device is known as a memory controler.
  • DRAM Contollers
  • SRAM Contollers
  • Non-volatile Storage
  • NOR Flash
  • NAND Flash
  • NAND Controllers
  • Hard Disk Drives and Solid State Drives
• Device Interface-High Performance
  • In many cases an SoC needs additional capabilities such as an external application-specific I/O device.The device interface consists of a device interface controller and a defined external interconnect to  attach to an external device.
  • A peripheral bus interface requires a number of capabilities:
  • Transaction mapping from the processor to the device address space. Routing
  • Inbound transaction
  • Interrupts
  • Physical standard
  • PCI = Peripheral Componet Interconnect
  • Bus Mastering
  • Universal Serial Bus
  • Programming Interface
  • Linux Driver
• Device Interconnet-Low Performance
• General-purpose Input/Output = GPIO
• Power Delivery
• Embedde Processor Architecture
• Operating Systems Overview
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