PIC16F877A.H头文件详细注释
* Header file for the Microchip
* PIC 16F873A chip
* PIC 16F874A chip
* PIC 16F876A chip
* PIC 16F877A chip
* Midrange Microcontroller
*/
#if defined(_16F874A) || defined(_16F877A)
#define __PINS_40
#endif
static volatile unsigned char INDF @ 0x00; //间接寻址寄存器
static volatile unsigned char TMR0 @ 0x01; //定时器0
static volatile unsigned char PCL @ 0x02; //低8位程序计数器
static volatile unsigned char STATUS @ 0x03; //程序状态寄存器
static unsigned char FSR @ 0x04; //特殊功能寄存器
static volatile unsigned char PORTA @ 0x05; //端口A寄存器
static volatile unsigned char PORTB @ 0x06; //端口B寄存器
static volatile unsigned char PORTC @ 0x07; //端口C寄存器
#ifdef __PINS_40
static volatile unsigned char PORTD @ 0x08; //端口D寄存器
static volatile unsigned char PORTE @ 0x09; //端口E寄存器
#endif
static unsigned char PCLATH @ 0x0A; //高5位程序计数器
static volatile unsigned char INTCON @ 0x0B; //中断控制寄存器
static volatile unsigned char PIR1 @ 0x0C; //中断标志寄存器PIR1
static volatile unsigned char PIR2 @ 0x0D; //中断标志寄存器PIR2
static volatile unsigned char TMR1L @ 0x0E; //低字节计数寄存器
static volatile unsigned char TMR1H @ 0x0F; //高字节计数寄存器
static volatile unsigned char T1CON @ 0x10; //TMR1控制寄存器
static volatile unsigned char TMR2 @ 0x11; //定时/计数器TMR2
static volatile unsigned char T2CON @ 0x12; //TMR2控制寄存器
static volatile unsigned char SSPBUF @ 0x13; //收/发数据缓冲器
static volatile unsigned char SSPCON @ 0x14; //同步串口控制寄存器，对MSSP模块的功能和指标进行设置和定义。
static volatile unsigned char CCPR1L @ 0x15; //捕获/比较/PWM寄存器低字节
static volatile unsigned char CCPR1H @ 0x16; //捕获/比较/PWM寄存器低字节
static volatile unsigned char CCP1CON @ 0x17; //CCP1CON寄存器
static volatile unsigned char RCSTA @ 0x18; //USART接收控制兼状态寄存器
static volatile unsigned char TXREG @ 0x19; //USART发生缓冲器
static volatile unsigned char RCREG @ 0x1A; //USART接收缓冲器
static volatile unsigned char CCPR2L @ 0x1B; //捕获/比较/PWM寄存器低字节
static volatile unsigned char CCPR2H @ 0x1C; //捕获/比较/PWM寄存器低字节
static volatile unsigned char CCP2CON @ 0x1D; //CCP2CON寄存器
static volatile unsigned char ADRESH @ 0x1E; //ADC转换结果寄存器高字节
static volatile unsigned char ADCON0 @ 0x1F; //A/D转换器开关位。
/* bank 1 registers */
static unsigned char bank1 OPTION @ 0x81; //选择寄存器，用于配置TMR0/WDT预分频系数、外部INT中断、TMR0和端口B的弱上拉。
static volatile unsigned char bank1 TRISA @ 0x85; //A口方向寄存器
static volatile unsigned char bank1 TRISB @ 0x86; //B口方向寄存器
static volatile unsigned char bank1 TRISC @ 0x87; //C口方向寄存器
#ifdef __PINS_40
static volatile unsigned char bank1 TRISD @ 0x88; //D口方向寄存器
static volatile unsigned char bank1 TRISE @ 0x89; //E口方向寄存器
#endif
static volatile unsigned char bank1 PIE1 @ 0x8C; //中断允许寄存器PIE1
static volatile unsigned char bank1 PIE2 @ 0x8D; //中断允许寄存器PIE2
static volatile unsigned char bank1 PCON @ 0x8E; //电源控制状态寄存器
static volatile unsigned char bank1 SSPCON2 @ 0x91; //MSSP控制寄存器2
static volatile unsigned char bank1 PR2 @ 0x92; //TMR2周期寄存器
static volatile unsigned char bank1 SSPADD @ 0x93; //同步串口地址寄存器
static volatile unsigned char bank1 SSPSTAT @ 0x94; //同步串口状态寄存器
static volatile unsigned char bank1 TXSTA @ 0x98; //USART发生控制兼状态寄存器
static volatile unsigned char bank1 SPBRG @ 0x99; //USART波特率发生器初值寄存器
static volatile unsigned char bank1 CMCON @ 0x9C; //比较控制寄存器
static volatile unsigned char bank1 CVRCON @ 0x9D; //比较电压参考控制寄存器
static volatile unsigned char bank1 ADRESL @ 0x9E; //ADC转换结果寄存器低字节
static volatile unsigned char bank1 ADCON1 @ 0x9F; //ADC控制寄存器ADCON1
/* bank 2 registers */
static volatile unsigned char bank2 EEDATA @ 0x10C; //EEPROM数据寄存器低字节
static volatile unsigned char bank2 EEADR @ 0x10D; //EEPROM地址寄存器低字节
static volatile unsigned char bank2 EEDATH @ 0x10E; //EEPROM数据寄存器高字节
static volatile unsigned char bank2 EEADRH @ 0x10F; //EEPROM地址寄存器高字节
/* bank 3 registers */
static volatile unsigned char bank3 EECON1 @ 0x18C; //EEPROM控制寄存器1
static volatile unsigned char bank3 EECON2 @ 0x18D; //EEPROM控制寄存器2
//* STATUS bits状态寄存器 */
static volatile bit IRP @ (unsigned)&STATUS*8+7; //寄存器bank选择位(用于间接寻址）。0:bank0,1;1:bank2,3
static volatile bit RP1 @ (unsigned)&STATUS*8+6; //寄存器bank选择位(用于直接寻址）。PR1:PR0:00:BANK0;01:BANK1;10:BANK2;11BANK3.
static volatile bit RP0 @ (unsigned)&STATUS*8+5; //
static volatile bit TO @ (unsigned)&STATUS*8+4; //超时位。0：WDT超时发生；1：上电后，执行了CLRWDT或者SLEEP指令
static volatile bit PD @ (unsigned)&STATUS*8+3; //掉电标志位。0：执行完SLEEP指令；1：上电后或者执行CLRWDT指令
static volatile bit ZERO @ (unsigned)&STATUS*8+2; //零标志位。0：算术或逻辑操作结果不为0；1：反之。
static volatile bit DC @ (unsigned)&STATUS*8+1; //数字进位/退位标志位。0：结果的低4位没有发生进位；1：反之。
static volatile bit CARRY @ (unsigned)&STATUS*8+0; //进位/退位标志位。0：结果的高4位没有发生进位；1：反之。
/* PORTA bits */
static volatile bit RA5 @ (unsigned)&PORTA*8+5; //RA5
static volatile bit RA4 @ (unsigned)&PORTA*8+4; //RA4
static volatile bit RA3 @ (unsigned)&PORTA*8+3; //RA3
static volatile bit RA2 @ (unsigned)&PORTA*8+2; //RA2
static volatile bit RA1 @ (unsigned)&PORTA*8+1; //RA1
static volatile bit RA0 @ (unsigned)&PORTA*8+0; //RA0
/* PORTB bits */
static volatile bit RB7 @ (unsigned)&PORTB*8+7; //RB7
static volatile bit RB6 @ (unsigned)&PORTB*8+6; //RB6
static volatile bit RB5 @ (unsigned)&PORTB*8+5; //RB5
static volatile bit RB4 @ (unsigned)&PORTB*8+4; //RB4
static volatile bit RB3 @ (unsigned)&PORTB*8+3; //RB3
static volatile bit RB2 @ (unsigned)&PORTB*8+2; //RB2
static volatile bit RB1 @ (unsigned)&PORTB*8+1; //RB1
static volatile bit RB0 @ (unsigned)&PORTB*8+0; //RB0
/* PORTC bits */
static volatile bit RC7 @ (unsigned)&PORTC*8+7; //RC7
static volatile bit RC6 @ (unsigned)&PORTC*8+6; //RC6
static volatile bit RC5 @ (unsigned)&PORTC*8+5; //RC5
static volatile bit RC4 @ (unsigned)&PORTC*8+4; //RC4
static volatile bit RC3 @ (unsigned)&PORTC*8+3; //RC3
static volatile bit RC2 @ (unsigned)&PORTC*8+2; //RC2
static volatile bit RC1 @ (unsigned)&PORTC*8+1; //RC1
static volatile bit RC0 @ (unsigned)&PORTC*8+0; //RC0
/* PORTD bits */
#ifdef __PINS_40
static volatile bit RD7 @ (unsigned)&PORTD*8+7; //RD7
static volatile bit RD6 @ (unsigned)&PORTD*8+6; //RD6
static volatile bit RD5 @ (unsigned)&PORTD*8+5; //RD5
static volatile bit RD4 @ (unsigned)&PORTD*8+4; //RD4
static volatile bit RD3 @ (unsigned)&PORTD*8+3; //RD3
static volatile bit RD2 @ (unsigned)&PORTD*8+2; //RD2
static volatile bit RD1 @ (unsigned)&PORTD*8+1; //RD1
static volatile bit RD0 @ (unsigned)&PORTD*8+0; //RD0
/* PORTE bits */
static volatile bit RE2 @ (unsigned)&PORTE*8+2; //RE2
static volatile bit RE1 @ (unsigned)&PORTE*8+1; //RE1
static volatile bit RE0 @ (unsigned)&PORTE*8+0; //RE0
#endif
//* INTCON bits 中断控制寄存器 */
static volatile bit GIE @ (unsigned)&INTCON*8+7; //总中断使能位。0：屏蔽所有的中断请求；1：允许非屏蔽的中断。
static volatile bit PEIE @ (unsigned)&INTCON*8+6; //外部中断使能位。0：禁止；1：使能
static volatile bit T0IE @ (unsigned)&INTCON*8+5; //TMR0溢出中断使能位。0：禁止；1：使能
static volatile bit INTE @ (unsigned)&INTCON*8+4; //RB0/INT外部中断使能位。0：不使能；1：使能。
static volatile bit RBIE @ (unsigned)&INTCON*8+3; //RB端口变化中断时能位。0：不使能；1：使能。
static volatile bit T0IF @ (unsigned)&INTCON*8+2; //TMR0溢出中断标志位。0：无溢出；1：溢出。
static volatile bit INTF @ (unsigned)&INTCON*8+1; //RB0/INT外部中断标志位。0：RB0外部中断未发生；1：RB0外部中断发生。
static volatile bit RBIF @ (unsigned)&INTCON*8+0; //RB端口变化中断标志位。0：RB口无变化；1：RB口至少有一个引脚变化。
// alternate definitions
static volatile bit TMR0IE @ (unsigned)&INTCON*8+5; //
static volatile bit TMR0IF @ (unsigned)&INTCON*8+2; //
//* PIR1 bits中断标志寄存器PIR1 */
#ifdef __PINS_40
static volatile bit PSPIF @ (unsigned)&PIR1*8+7; //并行从端口读写中断标志位。0：没有读写操作发生；1：反之
#endif
static volatile bit ADIF @ (unsigned)&PIR1*8+6; //A/D转换器中断标志位。0：A/D转换没有完成；1：A/D转换完成。
static volatile bit RCIF @ (unsigned)&PIR1*8+5; //USART接收中断标志位。0：接收缓冲器空；1：反之。
static volatile bit TXIF @ (unsigned)&PIR1*8+4; //USART发送中断标志位。0：发生缓冲器满；1：反之。
static volatile bit SSPIF @ (unsigned)&PIR1*8+3; //同步串行端口（ssp）中断标志位。0：没有ssp中断条件发生；
static volatile bit CCP1IF @ (unsigned)&PIR1*8+2; //CCP1中断标志位。
static volatile bit TMR2IF @ (unsigned)&PIR1*8+1; //TMR2 TO PR2匹配中断标志位。0：没有匹配发生
static volatile bit TMR1IF @ (unsigned)&PIR1*8+0; //TMR1溢出中断标志位，0：无溢出
/* PIR2 bits */
static volatile bit CMIF @ (unsigned)&PIR2*8+6; //比较器中断标志位；0：比较器输入没有改变
static volatile bit EEIF @ (unsigned)&PIR2*8+4; //EEPROM写操作中断标志位。0：写操作没有完成或没有开始
static volatile bit BCLIF @ (unsigned)&PIR2*8+3; //总线冲突中断标志位。0：没有总线冲突发生
static volatile bit CCP2IF @ (unsigned)&PIR2*8+0; //CCP2中断标志位
//* T1CON bits TMR1控制寄存器 */
static volatile bit T1CKPS1 @ (unsigned)&T1CON*8+5; //TMR1输入时钟预分频选择位
static volatile bit T1CKPS0 @ (unsigned)&T1CON*8+4; //TMR1输入时钟预分频选择位
static volatile bit T1OSCEN @ (unsigned)&T1CON*8+3; //TMR1震荡器使能控制位。0：振荡器关闭
static volatile bit T1SYNC @ (unsigned)&T1CON*8+2; //TMR1外部时钟输入同步控制位。
static volatile bit TMR1CS @ (unsigned)&T1CON*8+1; //TMR1时钟源选择位。0：内部时钟的/4
static volatile bit TMR1ON @ (unsigned)&T1CON*8+0; //TMR1使能位。0：禁止
//* T2CON bits TMR2控制寄存器 */
static volatile bit TOUTPS3 @ (unsigned)&T2CON*8+6; //TMR2后分频选择位。
static volatile bit TOUTPS2 @ (unsigned)&T2CON*8+5; //TMR2后分频选择位
static volatile bit TOUTPS1 @ (unsigned)&T2CON*8+4; //TMR2后分频选择位
static volatile bit TOUTPS0 @ (unsigned)&T2CON*8+3; //TMR2后分频选择位。
static volatile bit TMR2ON @ (unsigned)&T2CON*8+2; //TMR2使能位。
static volatile bit T2CKPS1 @ (unsigned)&T2CON*8+1; //TMR2预分频选择位。
static volatile bit T2CKPS0 @ (unsigned)&T2CON*8+0; //TMR2预分频选择位
//* SSPCON bits SPI同步串口控制寄存器*/
static volatile bit WCOL @ (unsigned)&SSPCON*8+7; //写操作冲突检测位，在SPI从动方式下，WCOL=0，未发生冲突，WCOL=1,发生冲突。
static volatile bit SSPOV @ (unsigned)&SSPCON*8+6; //接收溢出标志位，SSPOV=0，未发生接收溢出；SSPOV=1,发生接受溢出。
static volatile bit SSPEN @ (unsigned)&SSPCON*8+5; //同步串口MSSP允许位，SSPEN=0，关闭串口；SSPEN=1，允许串行端口功能。
static volatile bit CKP @ (unsigned)&SSPCON*8+4; //时钟极性选择位，CKP=0，空闲时时钟停留在低电平；CKP=1，空闲时时钟停留在高电平。
static volatile bit SSPM3 @ (unsigned)&SSPCON*8+3; //同步串行口MSSP方式选择位，主动参数。0，1，2，3，4.
static volatile bit SSPM2 @ (unsigned)&SSPCON*8+2;
static volatile bit SSPM1 @ (unsigned)&SSPCON*8+1;
static volatile bit SSPM0 @ (unsigned)&SSPCON*8+0;
/* CCP1CON bits */
static volatile bit CCP1X @ (unsigned)&CCP1CON*8+5; //PWM最小信号位
static volatile bit CCP1Y @ (unsigned)&CCP1CON*8+4; //PWM最小信号位
static volatile bit CCP1M3 @ (unsigned)&CCP1CON*8+3; //CCP1模式选择位
static volatile bit CCP1M2 @ (unsigned)&CCP1CON*8+2; //CCP1模式选择位
static volatile bit CCP1M1 @ (unsigned)&CCP1CON*8+1; //CCP1模式选择位
static volatile bit CCP1M0 @ (unsigned)&CCP1CON*8+0; //CCP1模式选择位
//* RCSTA bits USART接收控制兼状态寄存器 */
static volatile bit SPEN @ (unsigned)&RCSTA*8+7; //串行端口使能位。0：禁止；1：使能。
static volatile bit RX9 @ (unsigned)&RCSTA*8+6; //接收数据长度选择位。0：接收8位数据；1：接收9位
static volatile bit SREN @ (unsigned)&RCSTA*8+5; //单字节使能选择位。0：禁止；1：使能。异步模式未使用
static volatile bit CREN @ (unsigned)&RCSTA*8+4; //连续接收使能选择位。0：禁止连续接收使能
static volatile bit ADDEN @ (unsigned)&RCSTA*8+3; //地址匹配检测使能位。0：取消地址匹配检测
static volatile bit FERR @ (unsigned)&RCSTA*8+2; //帧格式错误标志位。0：未发生错误
static volatile bit OERR @ (unsigned)&RCSTA*8+1; //溢出标志位。0：未溢出
static volatile bit RX9D @ (unsigned)&RCSTA*8+0; //接收数据的第9位
/* CCP2CON bits */
static volatile bit CCP2X @ (unsigned)&CCP2CON*8+5; //PWM最小信号位
static volatile bit CCP2Y @ (unsigned)&CCP2CON*8+4; //PWM最小信号位
static volatile bit CCP2M3 @ (unsigned)&CCP2CON*8+3; //CCP2模式选择位
static volatile bit CCP2M2 @ (unsigned)&CCP2CON*8+2; //CCP2模式选择位
static volatile bit CCP2M1 @ (unsigned)&CCP2CON*8+1; //CCP2模式选择位
static volatile bit CCP2M0 @ (unsigned)&CCP2CON*8+0; //CCP2模式选择位
//* ADCON0 bits A/D控制寄存器位 */
static volatile bit ADCS1 @ (unsigned)&ADCON0*8+7; //选择A/D转换时钟。00：1/2;01:1/8;10:1/32;11:RC
static volatile bit ADCS0 @ (unsigned)&ADCON0*8+6; //选择A/D转换时钟
static volatile bit CHS2 @ (unsigned)&ADCON0*8+5; //AD模拟通道选择
static volatile bit CHS1 @ (unsigned)&ADCON0*8+4; //AD模拟通道选择
static volatile bit CHS0 @ (unsigned)&ADCON0*8+3; //AD模拟通道选择。000：选择信道0.
static volatile bit ADGO @ (unsigned)&ADCON0*8+2; //A/D转换状态位,ADON=1时，0：不在进行ad转换；1：正在进行转换。
static volatile bit ADON @ (unsigned)&ADCON0*8+0; //A/D转换器开关位，0：关闭；1：启动。
//* OPTION bits 选择寄存器 */
static bank1 bit RBPU @ (unsigned)&OPTION*8+7; //端口B上拉设置允许位
static bank1 bit INTEDG @ (unsigned)&OPTION*8+6; //外中断源选择位
static bank1 bit T0CS @ (unsigned)&OPTION*8+5; //时钟选择位。T0CS=0，使用内部时钟；T0CS=1，使用外部时钟。
static bank1 bit T0SE @ (unsigned)&OPTION*8+4; //计数器使用外部时钟，T0SE=0，上升沿触发；T0SE=1，下降沿触发。
static bank1 bit PSA @ (unsigned)&OPTION*8+3; //PSA=0，作为time0的预分频器；PSA=1，作为WDT的后分频器。
static bank1 bit PS2 @ (unsigned)&OPTION*8+2; //PS2,PS1,PS0。预分频比例。000=1：2（Timer0)1:1(WDT)...
static bank1 bit PS1 @ (unsigned)&OPTION*8+1; //
static bank1 bit PS0 @ (unsigned)&OPTION*8+0; //
//* TRISA bits PORTA数据方向寄存器 */
static volatile bank1 bit TRISA5 @ (unsigned)&TRISA*8+5; //
static volatile bank1 bit TRISA4 @ (unsigned)&TRISA*8+4; //
static volatile bank1 bit TRISA3 @ (unsigned)&TRISA*8+3; //
static volatile bank1 bit TRISA2 @ (unsigned)&TRISA*8+2; //
static volatile bank1 bit TRISA1 @ (unsigned)&TRISA*8+1; //
static volatile bank1 bit TRISA0 @ (unsigned)&TRISA*8+0; //
//* TRISB bits PORTB数据方向寄存器 */
static volatile bank1 bit TRISB7 @ (unsigned)&TRISB*8+7; //
static volatile bank1 bit TRISB6 @ (unsigned)&TRISB*8+6; //
static volatile bank1 bit TRISB5 @ (unsigned)&TRISB*8+5; //
static volatile bank1 bit TRISB4 @ (unsigned)&TRISB*8+4; //
static volatile bank1 bit TRISB3 @ (unsigned)&TRISB*8+3; //
static volatile bank1 bit TRISB2 @ (unsigned)&TRISB*8+2; //
static volatile bank1 bit TRISB1 @ (unsigned)&TRISB*8+1; //
static volatile bank1 bit TRISB0 @ (unsigned)&TRISB*8+0; //
//* TRISC bits PORTC数据方向寄存器 */
static volatile bank1 bit TRISC7 @ (unsigned)&TRISC*8+7; //
static volatile bank1 bit TRISC6 @ (unsigned)&TRISC*8+6; //
static volatile bank1 bit TRISC5 @ (unsigned)&TRISC*8+5; //
static volatile bank1 bit TRISC4 @ (unsigned)&TRISC*8+4; //
static volatile bank1 bit TRISC3 @ (unsigned)&TRISC*8+3; //
static volatile bank1 bit TRISC2 @ (unsigned)&TRISC*8+2; //
static volatile bank1 bit TRISC1 @ (unsigned)&TRISC*8+1; //
static volatile bank1 bit TRISC0 @ (unsigned)&TRISC*8+0; //
#ifdef __PINS_40
//* TRISD bits PORTD数据方向寄存器 */
static volatile bank1 bit TRISD7 @ (unsigned)&TRISD*8+7; //
static volatile bank1 bit TRISD6 @ (unsigned)&TRISD*8+6; //
static volatile bank1 bit TRISD5 @ (unsigned)&TRISD*8+5; //
static volatile bank1 bit TRISD4 @ (unsigned)&TRISD*8+4; //
static volatile bank1 bit TRISD3 @ (unsigned)&TRISD*8+3; //
static volatile bank1 bit TRISD2 @ (unsigned)&TRISD*8+2; //
static volatile bank1 bit TRISD1 @ (unsigned)&TRISD*8+1; //
static volatile bank1 bit TRISD0 @ (unsigned)&TRISD*8+0; //
//* TRISE bits PORTE数据方向寄存器 */
static volatile bank1 bit IBF @ (unsigned)&TRISE*8+7; //
static volatile bank1 bit OBF @ (unsigned)&TRISE*8+6; //
static volatile bank1 bit IBOV @ (unsigned)&TRISE*8+5; //
static volatile bank1 bit PSPMODE @ (unsigned)&TRISE*8+4; //
static volatile bank1 bit TRISE2 @ (unsigned)&TRISE*8+2; //
static volatile bank1 bit TRISE1 @ (unsigned)&TRISE*8+1; //
static volatile bank1 bit TRISE0 @ (unsigned)&TRISE*8+0; //
#endif
//* PIE1 bits 外围中断独立使能位 */
#ifdef __PINS_40
static volatile bank1 bit PSPIE @ (unsigned)&PIE1*8+7; //并行从端口读写中断使能位。0：禁止psp读写中断
#endif
static volatile bank1 bit ADIE @ (unsigned)&PIE1*8+6; //A/D转换器中断标志位。0：A/D转换没有完成；1：A/D转换完成。
static volatile bank1 bit RCIE @ (unsigned)&PIE1*8+5; //USART接收中断标志位。0：接收缓冲器空；1：反之。
static volatile bank1 bit TXIE @ (unsigned)&PIE1*8+4; ////USART发送中断标志位。0：发生缓冲器满；1：反之。
static volatile bank1 bit SSPIE @ (unsigned)&PIE1*8+3; //同步串行端口中断使能位
static volatile bank1 bit CCP1IE @ (unsigned)&PIE1*8+2; //CCP1中断使能位
static volatile bank1 bit TMR2IE @ (unsigned)&PIE1*8+1; //TMR2 TO PR2匹配中断标志位。0：没有匹配发生
static volatile bank1 bit TMR1IE @ (unsigned)&PIE1*8+0; //TMR1溢出中断标志位，0：无溢出
/* PIE2 bits */
static volatile bank1 bit CMIE @ (unsigned)&PIE2*8+6; //比较器中断使能位
static volatile bank1 bit EEIE @ (unsigned)&PIE2*8+4; //EEPROM写操作中断使能位
static volatile bank1 bit BCLIE @ (unsigned)&PIE2*8+3; //总线冲突中断使能位
static volatile bank1 bit CCP2IE @ (unsigned)&PIE2*8+0; //CCP2中断使能位
//* PCON bits 电源控制寄存器 */
static volatile bank1 bit POR @ (unsigned)&PCON*8+1; //上电复位状态位
static volatile bank1 bit BOR @ (unsigned)&PCON*8+0; //掉电复位状态位
//* SSPCON2 bits MSSP控制寄存器2*/
static volatile bank1 bit GCEN @ (unsigned)&SSPCON2*8+7; //总调用使能位
static volatile bank1 bit ACKSTAT @ (unsigned)&SSPCON2*8+6; //应答状态位
static volatile bank1 bit ACKDT @ (unsigned)&SSPCON2*8+5; //应答数据位
static volatile bank1 bit ACKEN @ (unsigned)&SSPCON2*8+4; //应答顺序使能位
static volatile bank1 bit RCEN @ (unsigned)&SSPCON2*8+3; //接收使能位
static volatile bank1 bit PEN @ (unsigned)&SSPCON2*8+2; //停止条件使能位
static volatile bank1 bit RSEN @ (unsigned)&SSPCON2*8+1; //重复开始条件使能位
static volatile bank1 bit SEN @ (unsigned)&SSPCON2*8+0; //开始条件使能位
//* SSPSTAT bits SPI同步串口状态寄存器 */
static volatile bank1 bit STAT_SMP @ (unsigned)&SSPSTAT*8+7; //SPI采样控制位。SPI主控方式，STAT_SMP=0,在输出的数据中间采样输入数据，为1时，在末端采样；SPI从动方式，STAT_SMP必须置位。
static volatile bank1 bit STAT_CKE @ (unsigned)&SSPSTAT*8+6; //SPI时钟沿选择,CKP=0时，STAT_CKE=0,SCK下降沿发送数据，STAT_CKE=1,SCK上升沿发送数据。CKP=1时，反之。
static volatile bank1 bit STAT_DA @ (unsigned)&SSPSTAT*8+5; //数据/地址位
static volatile bank1 bit STAT_P @ (unsigned)&SSPSTAT*8+4; //停止位
static volatile bank1 bit STAT_S @ (unsigned)&SSPSTAT*8+3; //开始位
static volatile bank1 bit STAT_RW @ (unsigned)&SSPSTAT*8+2; //读写位信息
static volatile bank1 bit STAT_UA @ (unsigned)&SSPSTAT*8+1; //更新地址位
static volatile bank1 bit STAT_BF @ (unsigned)&SSPSTAT*8+0; //缓冲器满标志位。STAT_BF=0，缓冲器空；STAT_BF=1，缓冲器满。
//* TXSTA bits USART发送控制兼状态寄存器*/
static volatile bank1 bit CSRC @ (unsigned)&TXSTA*8+7; //同步时钟选择位。0：选外部时钟；1：选内部时钟。异步模式未用。
static volatile bank1 bit TX9 @ (unsigned)&TXSTA*8+6; //发生长度选择位。0：发送8位数据；1：发送9位
static volatile bank1 bit TXEN @ (unsigned)&TXSTA*8+5; //发生使能选择位。0：禁止发送；1：使能发生
static volatile bank1 bit SYNC @ (unsigned)&TXSTA*8+4; //同步/异步模式选择位。0：异步；1：同步
static volatile bank1 bit BRGH @ (unsigned)&TXSTA*8+2; //高速波特率选择位。0：低速；1：高速。
static volatile bank1 bit TRMT @ (unsigned)&TXSTA*8+1; //移位寄存器空标志位。0，发生移位寄存器满，1，为空。
static volatile bank1 bit TX9D @ (unsigned)&TXSTA*8+0; //发生第9位的选择位，0,不发生，1，发送。
//* CMCON Bits 比较器控制寄存器 */
static volatile bank1 bit C2OUT @ (unsigned)&CMCON*8+7; //比较器2输出位
static volatile bank1 bit C1OUT @ (unsigned)&CMCON*8+6; //比较器1输出位
static volatile bank1 bit C2INV @ (unsigned)&CMCON*8+5; //比较器3输出反向位
static volatile bank1 bit C1INV @ (unsigned)&CMCON*8+4; //比较器1输出反向位
static volatile bank1 bit CIS @ (unsigned)&CMCON*8+3; //比较器输入开关位
static volatile bank1 bit CM2 @ (unsigned)&CMCON*8+2; //比较器模式位
static volatile bank1 bit CM1 @ (unsigned)&CMCON*8+1; //比较器模式位
static volatile bank1 bit CM0 @ (unsigned)&CMCON*8+0; //比较器模式位
//* CVRCON Bits 比较电压参考寄存器 */
static volatile bank1 bit CVREN @ (unsigned)&CVRCON*8+7; //比较器电压参考使能位
static volatile bank1 bit CVROE @ (unsigned)&CVRCON*8+6; //比较器Vref输出使能位
static volatile bank1 bit CVRR @ (unsigned)&CVRCON*8+5; //比较器Vref范围选择位
static volatile bank1 bit CVR3 @ (unsigned)&CVRCON*8+3; //比较器Vref值选择位
static volatile bank1 bit CVR2 @ (unsigned)&CVRCON*8+2; //比较器Vref值选择位
static volatile bank1 bit CVR1 @ (unsigned)&CVRCON*8+1; //比较器Vref值选择位
static volatile bank1 bit CVR0 @ (unsigned)&CVRCON*8+0; //比较器Vref值选择位
//* ADCON1 bits ADC控制寄存器ADCON1*/
static volatile bank1 bit ADFM @ (unsigned)&ADCON1*8+7; //AD转换结果格式选择位
static volatile bank1 bit ADCS2 @ (unsigned)&ADCON1*8+6; //AD转换时钟选择位
static volatile bank1 bit PCFG3 @ (unsigned)&ADCON1*8+3; //PCFG3-PCFG0AD转换引脚功能选择位。详细意义见手册PAGE-130.
static volatile bank1 bit PCFG2 @ (unsigned)&ADCON1*8+2;
static volatile bank1 bit PCFG1 @ (unsigned)&ADCON1*8+1;
static volatile bank1 bit PCFG0 @ (unsigned)&ADCON1*8+0;
//* EECON1 bits EEPROM控制寄存器*/
static volatile bank3 bit EEPGD @ (unsigned)&EECON1*8+7; //程序/数据EEPROM选择位。0：选择访问数据存储器
static volatile bank3 bit WRERR @ (unsigned)&EECON1*8+3; //EEPROM错误标志位。0：写操作完成
static volatile bank3 bit WREN @ (unsigned)&EECON1*8+2; //EEPROM写使能位。1：允许
static volatile bank3 bit WR @ (unsigned)&EECON1*8+1; //写控制位
static volatile bank3 bit RD @ (unsigned)&EECON1*8+0; //读控制位
#define CONFIG_ADDR 0x2007
/*osc configurations*/
#define RC 0x3FFF // resistor/capacitor RC振荡器
#define HS 0x3FFE // high speed crystal/resonator
#define XT 0x3FFD // crystal/resonator
#define LP 0x3FFC // low power crystal/resonator
/*watchdog*/
#define WDTEN 0x3FFF // enable watchdog timer
#define WDTDIS 0x3FFB // disable watchdog timer
/*power up timer*/
#define PWRTEN 0x3FF7 // enable power up timer
#define PWRTDIS 0x3FFF // disable power up timer
/*brown out reset*/
#define BOREN 0x3FFF // enable brown out reset
#define BORDIS 0x3FBF // disable brown out reset
/*Low Voltage Programmable*/
#define LVPEN 0x3FFF // low voltage programming enabled
#define LVPDIS 0x3F7F // low voltage programming disabled
/*data code protected*/
#define DP 0x3EFF // protect data code
// alternately
#define DPROT 0x3EFF // use DP
#define DUNPROT 0x3FFF // use UNPROTECT
/* Flash memory write enable/protect */
#define WRTEN 0x3FFF /* flash memory write enabled */
#define WP1 0x3DFF /* protect 0000 - 00FF */
#define WP2 0x3BFF /* protect 0000 - 07FF(76A/77A) / 03FF(73A/74A) */
#define WP3 0x39FF /* protect 0000 - 1FFF(76A/77A) / 0FFF(73A/74A) */
/*debug option*/
#define DEBUGEN 0x37FF // debugger enabled
#define DEBUGDIS 0x3FFF // debugger disabled
/*code protection*/
#define PROTECT 0x1FFF /* protect program code */
#define UNPROTECT 0x3FFF /* do not protect the code */
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