INSTRUCTION EXECUTION CHARACTERISTICS

Characteristics of Some CISCs, RISCs, and Superscalar Processors

One of the most visible forms of evolution associated with computers is that of pro-
gramming languages. As the cost of hardware has dropped, the relative cost of soft-
ware has risen. Along with that, a chronic shortage of programmers has driven up
software costs in absolute terms. Thus, the major cost in the life cycle of a system is
software, not hardware. Adding to the cost, and to the inconvenience, is the element
of unreliability: it is common for programs, both system and application, to continue
to exhibit new bugs after years of operation.
The  response  from  researchers  and  industry  has  been  to  develop  ever  more
powerful  and  complex  high-level  programming  languages.  These  high-level  lan-
guages  (HLLs):  (1)  allow  the  programmer  to  express  algorithms  more  concisely,
(2) allow the compiler to take care of details that are not important in the program-
mer’s expression of algorithms, and (3) often support naturally the use of structured
programming and/or object-oriented design.
Alas,  this  solution  gave  rise  to  a  perceived  problem,  known  as  the  semantic
gap,  the  difference  between  the  operations  provided  in  HLLs  and  those  provided
in  computer  architecture.  Symptoms  of  this  gap  are  alleged  to  include  execution
inefficiency,  excessive  machine  program  size,  and  compiler  complexity.  Designers
responded with architectures intended to close this gap. Key features include large
instruction  sets,  dozens  of  addressing  modes,  and  various  HLL  statements  imple-
mented in hardware. An example of the latter is the CASE machine instruction on
the VAX. Such complex instruction sets are intended to

•  Ease the task of the compiler writer.
  •  Improve  execution  efficiency,  because  complex  sequences  of  operations  can
be implemented in microcode.
  •  Provide support for even more complex and sophisticated HLLs.
Meanwhile, a number of studies have been done over the years to determine
the  characteristics  and  patterns  of  execution  of  machine  instructions  generated
from HLL programs. The results of these studies inspired some researchers to look
for  a  different  approach:  namely,  to  make  the  architecture  that  supports  the  HLL
simpler, rather than more complex.

To  understand  the  line  of  reasoning  of  the  RISC  advocates,  we  begin  with  a
brief review of instruction execution characteristics. The aspects of computation of
interest are as follows:
  •  Operations performed: These determine the functions to be performed by the
processor and its interaction with memory.
  •  Operands  used:  The  types  of  operands  and  the  frequency  of  their  use  deter-
mine the memory organization for storing them and the addressing modes for
accessing them.
  •  Execution sequencing: This determines the control and pipeline organization.
In  the  remainder  of  this  section,  we  summarize  the  results  of  a  number  of
studies  of  high-level-language  programs.  All  of  the  results  are  based  on  dynamic
measurements. That is, measurements are collected by executing the program and
counting  the  number  of  times  some  feature  has  appeared  or  a  particular  property
has held true. In contrast, static measurements merely perform these counts on the
source text of a program. They give no useful information on performance, because
they are not weighted relative to the number of times each statement is executed.