NVIDIA---CUDA

http://en.wikipedia.org/wiki/CUDA

CUDA

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CUDA

Developer(s)	NVIDIA Corporation
Stable release	6.0 / November 14, 2013; 4 days ago
Operating system	Windows XP and later, Mac OS X, Linux
Platform	Supported GPUs
Type	GPGPU
License	Freeware
Website	www.nvidia.com/object/cuda_home_new.html

CUDA (aka Compute Unified Device Architecture) is a parallel computing platform and programming model created by NVIDIA and implemented by the graphics processing units (GPUs) that they produce.^[1]CUDA gives program developers direct access to the virtual instruction set and memory of the parallel computational elements in CUDA GPUs.

Using CUDA, the GPUs can be used for general purpose processing (i.e., not exclusively graphics); this approach is known as GPGPU. Unlike CPUs, however, GPUs have a parallel throughput architecture that emphasizes executing many concurrent threads slowly, rather than executing a single thread very quickly.

The CUDA platform is accessible to software developers through CUDA-accelerated libraries, compiler directives (such as OpenACC), and extensions to industry-standard programming languages, including C,C++ and Fortran. C/C++ programmers use 'CUDA C/C++', compiled with "nvcc", NVIDIA's LLVM-based C/C++ compiler,^[2] and Fortran programmers can use 'CUDA Fortran', compiled with the PGI CUDA Fortran compiler from The Portland Group.

In addition to libraries, compiler directives, CUDA C/C++ and CUDA Fortran, the CUDA platform supports other computational interfaces, including the Khronos Group's OpenCL,^[3] Microsoft's DirectCompute, and C++ AMP.^[4] Third party wrappers are also available for Python, Perl, Fortran, Java, Ruby, Lua, Haskell,MATLAB, IDL, and native support in Mathematica.

In the computer game industry, GPUs are used not only for graphics rendering but also in game physics calculations (physical effects like debris, smoke, fire, fluids); examples include PhysX and Bullet. CUDA has also been used to accelerate non-graphical applications in computational biology, cryptography and other fields by an order of magnitude or more.^{[5][6][7][8][9]}

CUDA provides both a low level API and a higher level API. The initial CUDA SDK was made public on 15 February 2007, for Microsoft Windows and Linux. Mac OS Xsupport was later added in version 2.0,^[10] which supersedes the beta released February 14, 2008.^[11] CUDA works with all Nvidia GPUs from the G8x series onwards, including GeForce, Quadro and the Tesla line. CUDA is compatible with most standard operating systems. Nvidia states that programs developed for the G8x series will also work without modification on all future Nvidia video cards, due to binary compatibility.

Example of CUDA processing flow
1. Copy data from main mem to GPU mem
2. CPU instructs the process to GPU
3. GPU execute parallel in each core
4. Copy the result from GPU mem to main mem

Contents

[hide] 

• 1 Background
• 2 Advantages
• 3 Limitations
• 4 Supported GPUs
• 5 Version features and specifications
• 6 Example
• 7 Language bindings
• 8 Current CUDA architectures
• 9 Current and future usages of CUDA architecture
• 10 See also
• 11 References
• 12 External links

Background[edit]

See also: GPU

The GPU, as a specialized processor, addresses the demands of real-time high-resolution 3D graphics compute-intensive tasks. As of 2012, GPUs have evolved into highly parallel multi-core systems allowing very efficient manipulation of large blocks of data. This design is more effective than general-purpose CPUs for algorithmswhere processing of large blocks of data is done in parallel, such as:

• push-relabel maximum flow algorithm
• fast sort algorithms of large lists
• two-dimensional fast wavelet transform
• molecular dynamics simulations

Advantages[edit]

CUDA has several advantages over traditional general-purpose computation on GPUs (GPGPU) using graphics APIs:

• Scattered reads – code can read from arbitrary addresses in memory
• Shared memory – CUDA exposes a fast shared memory region (up to 48KB per Multi-Processor) that can be shared amongst threads. This can be used as a user-managed cache, enabling higher bandwidth than is possible using texture lookups.^[12]
• Faster downloads and readbacks to and from the GPU
• Full support for integer and bitwise operations, including integer texture lookups

Limitations[edit]

• CUDA does not support the full C standard, as it runs host code through a C++ compiler, which makes some valid C (but invalid C++) code fail to compile.^[13][14]
• Texture rendering is not supported (CUDA 3.2 and up addresses this by introducing "surface writes" to CUDA arrays, the underlying opaque data structure).
• Copying between host and device memory may incur a performance hit due to system bus bandwidth and latency (this can be partly alleviated with asynchronous memory transfers, handled by the GPU's DMA engine)
• Threads should be running in groups of at least 32 for best performance, with total number of threads numbering in the thousands. Branches in the program code do not affect performance significantly, provided that each of 32 threads takes the same execution path; the SIMD execution model becomes a significant limitation for any inherently divergent task (e.g. traversing a space partitioning data structure during ray tracing).
• Unlike OpenCL, CUDA-enabled GPUs are only available from Nvidia^[15]
• Valid C/C++ may sometimes be flagged and prevent compilation due to optimization techniques the compiler is required to employ to use limited resources.
• CUDA (with compute capability 1.x) uses a recursion-free, function-pointer-free subset of the C language, plus some simple extensions. However, a single process must run spread across multiple disjoint memory spaces, unlike other C language runtime environments.
• CUDA (with compute capability 2.x) allows a subset of C++ class functionality, for example member functions may not be virtual (this restriction will be removed in some future release). [See CUDA C Programming Guide 3.1 – Appendix D.6]
• Double precision floats (CUDA compute capability 1.3 and above)^[16] deviate from the IEEE 754 standard: round-to-nearest-even is the only supported rounding mode for reciprocal, division, and square root. In single precision, denormals and signalling NaNs are not supported; only two IEEE rounding modes are supported (chop and round-to-nearest even), and those are specified on a per-instruction basis rather than in a control word; and the precision of division/square root is slightly lower than single precision.

Supported GPUs[edit]

Compute capability table (version of CUDA supported) by GPU and card. Also available directly from Nvidia:

Compute capability (version)	GPUs	Cards
1.0	G80, G92, G92b, G94, G94b	GeForce 8800GTX/Ultra, 9400GT, 9600GT, 9800GT, Tesla C/D/S870, FX4/5600, 360M, GT 420
1.1	G86, G84, G98, G96, G96b, G94, G94b, G92, G92b	GeForce 8400GS/GT, 8600GT/GTS, 8800GT/GTS, 9600 GSO, 9800GTX/GX2, GTS 250, GT 120/30/40, FX 4/570, 3/580, 17/18/3700, 4700x2, 1xxM, 32/370M, 3/5/770M, 16/17/27/28/36/37/3800M, NVS290, NVS420/50
1.2	GT218, GT216, GT215	GeForce 210, GT 220/240, FX380 LP, 1800M, 370/380M, NVS300, NVS 2/3100M
1.3	GT200, GT200b	GeForce GTX 260, GTX 275, GTX 280, GTX 285, GTX 295, Tesla C/M1060, S1070, Quadro CX, FX 3/4/5800
2.0	GF100, GF110	GeForce (GF100) GTX 465, GTX 470, GTX 480, Tesla C2050, C2070, S/M2050/70, Quadro Plex 7000, Quadro 4000, 5000, 6000, GeForce (GF110) GTX 560 TI 448, GTX570, GTX580, GTX590
2.1	GF104, GF106 GF108，GF114, GF116, GF119	GeForce 500M series, 610M, GT630M，GTX 670M, GeForce GTX 675M, GT 430, GT 440, GTS 450, GTX 460, GT 545, GTX 550 Ti, GTX 560, GTX 560 Ti, 605，615，620， Quadro 600, 2000
3.0	GK104, GK106, GK107	GeForce GTX 770, GTX 760, GTX 690, GTX 680, GTX 670, GTX 660 Ti, GTX 660, GTX 650 Ti BOOST, GTX 650 Ti, GTX 650, GT 640, GT 630, GeForce GTX 780M, GeForce GTX 775M（for Apple OEM only）, GeForce GTX 770M, GeForce GTX 765M, GeForce GTX 760M, GeForce GT 755M（for Apple OEM only）, GeForce GT 750M, GeForce GT 745M, GeForce GT 740M, GeForce GTX 680MX（for Apple OEM only）, GeForce GTX 680M, GeForce GTX 675MX, GeForce GTX 670MX, GTX 660M, GeForce GT 650M, GeForce GT 645M, GeForce GT 640M, Quadro K600, Quadro K2000, Quadro K4000, Quadro K5000, Quadro K2100M，Quadro K4100M，Quadro K5100M
3.5	GK110, GK208	Tesla K40, K20X, K20, GeForce GTX TITAN, GTX780Ti, GTX 780, Quadro K510M, Quadro K610M, Quadro K6000, GT 640(Rev.2)

A table of devices officially supporting CUDA:^[15]

Nvidia GeForce GeForce GTX TITAN GeForce GTX 780 Ti GeForce GTX 780 GeForce GTX 770 GeForce GTX 760 GeForce GTX 690 GeForce GTX 680 GeForce GTX 670 GeForce GTX 660 Ti GeForce GTX 660 GeForce GTX 650 Ti BOOST GeForce GTX 650 Ti GeForce GTX 650 GeForce GT 640 GeForce GTX 590 GeForce GTX 580 GeForce GTX 570 GeForce GTX 560 Ti GeForce GTX 560 GeForce GTX 550 Ti GeForce GT 520 GeForce GTX 480 GeForce GTX 470 GeForce GTX 465 GeForce GTX 460 GeForce GTX 460 SE GeForce GTS 450 GeForce GT 440 GeForce GT 430 GeForce GT 420 GeForce GTX 295 GeForce GTX 285 GeForce GTX 280 GeForce GTX 275 GeForce GTX 260 GeForce GTS 250 GeForce GTS 240 GeForce GT 240 GeForce GT 220 GeForce 210/G210 GeForce GT 140 GeForce 9800 GX2 GeForce 9800 GTX+ GeForce 9800 GTX GeForce 9800 GT GeForce 9600 GSO GeForce 9600 GT GeForce 9500 GT GeForce 9400 GT GeForce 9400 mGPU GeForce 9300 mGPU GeForce 9100 mGPU GeForce 8800 Ultra GeForce 8800 GTX GeForce 8800 GTS GeForce 8800 GT GeForce 8800 GS GeForce 8600 GTS GeForce 8600 GT GeForce 8600 mGT GeForce 8500 GT GeForce 8400 GS GeForce 8300 mGPU GeForce 8200 mGPU GeForce 8100 mGPU GeForce GT 630

Nvidia GeForce Mobile GeForce GTX 780M GeForce GTX 770M GeForce GTX 765M GeForce GTX 760M GeForce GT 750M GeForce GT 745M GeForce GT 740M GeForce GT 735M GeForce GT 730M GeForce GTX 680MX GeForce GTX 680M GeForce GTX 675MX GeForce GTX 675M GeForce GTX 670MX GeForce GTX 670M GeForce GTX 660M GeForce GT 650M GeForce GT 645M GeForce GT 640M GeForce GTX 580M GeForce GTX 570M GeForce GTX 560M GeForce GT 555M GeForce GT 550M GeForce GT 540M GeForce GT 525M GeForce GT 520M GeForce GTX 480M GeForce GTX 470M GeForce GTX 460M GeForce GT 445M GeForce GT 435M GeForce GT 425M GeForce GT 420M GeForce GT 415M GeForce GTX 285M GeForce GTX 280M GeForce GTX 260M GeForce GTS 360M GeForce GTS 350M GeForce GTS 260M GeForce GTS 250M GeForce GT 335M GeForce GT 330M GeForce GT 325M GeForce GT 320M GeForce 310M GeForce GT 240M GeForce GT 230M GeForce GT 220M GeForce G210M GeForce GTS 160M GeForce GTS 150M GeForce GT 130M GeForce GT 120M GeForce G110M GeForce G105M GeForce G103M GeForce G102M GeForce G100 GeForce 9800M GTX GeForce 9800M GTS GeForce 9800M GT GeForce 9800M GS GeForce 9700M GTS GeForce 9700M GT GeForce 9650M GT GeForce 9650M GS GeForce 9600M GT GeForce 9600M GS GeForce 9500M GS GeForce 9500M G GeForce 9400M G GeForce 9300M GS GeForce 9300M G GeForce 9200M GS GeForce 9100M G GeForce 8800M GTX GeForce 8800M GTS GeForce 8700M GT GeForce 8600M GT GeForce 8600M GS GeForce 8400M GT GeForce 8400M GS GeForce 8400M G GeForce 8200M G

Nvidia Quadro Quadro K6000 Quadro K5000 Quadro K4000 Quadro K2000D Quadro K2000 Quadro K600 Quadro 6000 Quadro 5000 Quadro 4000 Quadro 2000 Quadro 600 Quadro FX 5800 Quadro FX 5600 Quadro FX 4800 Quadro FX 4700 X2 Quadro FX 4600 Quadro FX 3800 Quadro FX 3700 Quadro FX 1800 Quadro FX 1700 Quadro FX 580 Quadro FX 570 Quadro FX 380 Quadro FX 370 Quadro NVS 510 Quadro NVS 450 Quadro NVS 420 Quadro NVS 295 Quadro Plex 1000 Model IV Quadro Plex 1000 Model S4 Nvidia Quadro Mobile Quadro K5100M Quadro K5000M Quadro K4100M Quadro K4000M Quadro K3100M Quadro K3000M Quadro K2100M Quadro K2000M Quadro K1100M Quadro K1000M Quadro K610M Quadro K510M Quadro K500M Quadro 5010M Quadro 5000M Quadro 4000M Quadro 3000M Quadro 2000M Quadro 1000M Quadro FX 3800M Quadro FX 3700M Quadro FX 3600M Quadro FX 2800M Quadro FX 2700M Quadro FX 1800M Quadro FX 1700M Quadro FX 1600M Quadro FX 880M Quadro FX 770M Quadro FX 570M Quadro FX 380M Quadro FX 370M Quadro FX 360M Quadro NVS 320M Quadro NVS 160M Quadro NVS 150M Quadro NVS 140M Quadro NVS 135M Quadro NVS 130M Nvidia Tesla Tesla K40 Tesla K20X Tesla K20 Tesla K10 Tesla C2050/2070 Tesla M2050/M2070 Tesla S2050 Tesla S1070 Tesla M1060 Tesla C1060 Tesla C870 Tesla D870 Tesla S870

Version features and specifications[edit]

Feature support (unlisted features are supported for all compute capabilities)	Compute capability (version)
	1.0	1.1	1.2	1.3	2.x	3.0	3.5
Integer atomic functions operating on 32-bit words in global memory	No	Yes
atomicExch() operating on 32-bit floating point values in global memory
Integer atomic functions operating on 32-bit words in shared memory	No		Yes
atomicExch() operating on 32-bit floating point values in shared memory
Integer atomic functions operating on 64-bit words in global memory
Warp vote functions
Double-precision floating-point operations	No			Yes
Atomic functions operating on 64-bit integer values in shared memory	No				Yes
Floating-point atomic addition operating on 32-bit words in global and shared memory
_ballot()
_threadfence_system()
_syncthreads_count(), _syncthreads_and(), _syncthreads_or()
Surface functions
3D grid of thread block
Warp shuffle functions	No					Yes
Funnel shift	No						Yes
Dynamic parallelism

Technical specifications	Compute capability (version)
	1.0	1.1	1.2	1.3	2.x	3.0	3.5
Maximum dimensionality of grid of thread blocks	2				3
Maximum x-, y-, or z-dimension of a grid of thread blocks	65535					231-1
Maximum dimensionality of thread block	3
Maximum x- or y-dimension of a block	512				1024
Maximum z-dimension of a block	64
Maximum number of threads per block	512				1024
Warp size	32
Maximum number of resident blocks per multiprocessor	8					16
Maximum number of resident warps per multiprocessor	24		32		48	64
Maximum number of resident threads per multiprocessor	768		1024		1536	2048
Number of 32-bit registers per multiprocessor	8 K		16 K		32 K	64 K
Maximum number of 32-bit registers per thread	128				63		255
Maximum amount of shared memory per multiprocessor	16 KB				48 KB
Number of shared memory banks	16				32
Amount of local memory per thread	16 KB				512 KB
Constant memory size	64 KB
Cache working set per multiprocessor for constant memory	8 KB
Cache working set per multiprocessor for texture memory	Device dependent, between 6 KB and 8 KB				12 KB		Between 12 KB and 48 KB
Maximum width for 1D texture reference bound to a CUDA array	8192				65536
Maximum width for 1D texture reference bound to linear memory	227
Maximum width and number of layers for a 1D layered texture reference	8192 × 512				16384 × 2048
Maximum width and height for 2D texture reference bound to a CUDA array	65536 × 32768				65536 × 65535
Maximum width and height for 2D texture reference bound to a linear memory	65000 × 65000				65000 × 65000
Maximum width and height for 2D texture reference bound to a CUDA array supporting texture gather	N/A				16384 × 16384
Maximum width, height, and number of layers for a 2D layered texture reference	8192 × 8192 × 512				16384 × 16384 × 2048
Maximum width, height and depth for a 3D texture reference bound to linear memory or a CUDA array	2048 × 2048 × 2048					4096 × 4096 × 4096
Maximum width (and height) for a cubemap texture reference	N/A				16384
Maximum width (and height) and number of layers for a cubemap layered texture reference	N/A				16384 × 2046
Maximum number of textures that can be bound to a kernel	128					256
Maximum width for a 1D surface reference bound to a CUDA array	Not supported				65536
Maximum width and number of layers for a 1D layered surface reference					65536 × 2048
Maximum width and height for a 2D surface reference bound to a CUDA array					65536 × 32768
Maximum width, height, and number of layers for a 2D layered surface reference					65536 × 32768 × 2048
Maximum width, height, and depth for a 3D surface reference bound to a CUDA array					65536 × 32768 × 2048
Maximum width (and height) for a cubemap surface reference bound to a CUDA array					32768
Maximum width (and height) and number of layers for a cubemap layered surface reference					32768 × 2046
Maximum number of surfaces that can be bound to a kernel					8	16
Maximum number of instructions per kernel	2 million				512 million

Architecture specifications	Compute capability (version)
	1.0	1.1	1.2	1.3	2.0	2.1	3.0	3.5
Number of cores for integer and floating-point arithmetic functions operations	8[17]				32	48	192	192
Number of special function units for single-precision floating-point transcendental functions	2				4	8	32	32
Number of texture filtering units for every texture address unit or render output unit (ROP)	2				4	8	32	32
Number of warp schedulers	1				2	2	4	4
Number of instructions issued at once by scheduler	1				1	2[18]	2	2

For more information please visit this site: http://www.geeks3d.com/20100606/gpu-computing-nvidia-cuda-compute-capability-comparative-table/ and also read Nvidia CUDA programming guide.^[19]

Example[edit]

This example code in C++ loads a texture from an image into an array on the GPU:

texture<float, 2, cudaReadModeElementType> tex;

void foo()
{
  cudaArray* cu_array;

  // Allocate array
  cudaChannelFormatDesc description = cudaCreateChannelDesc<float>();
  cudaMallocArray(&cu_array, &description, width, height);

  // Copy image data to array
  cudaMemcpyToArray(cu_array, image, width*height*sizeof(float), cudaMemcpyHostToDevice);

  // Set texture parameters (default)
  tex.addressMode[0] = cudaAddressModeClamp;
  tex.addressMode[1] = cudaAddressModeClamp;
  tex.filterMode = cudaFilterModePoint;
  tex.normalized = false; // do not normalize coordinates

  // Bind the array to the texture
  cudaBindTextureToArray(tex, cu_array);

  // Run kernel
  dim3 blockDim(16, 16, 1);
  dim3 gridDim((width + blockDim.x - 1)/ blockDim.x, (height + blockDim.y - 1) / blockDim.y, 1);
  kernel<<< gridDim, blockDim, 0 >>>(d_data, height, width);

  // Unbind the array from the texture
  cudaUnbindTexture(tex);
} //end foo()

__global__ void kernel(float* odata, int height, int width)
{
   unsigned int x = blockIdx.x*blockDim.x + threadIdx.x;
   unsigned int y = blockIdx.y*blockDim.y + threadIdx.y;
   if (x < width && y < height) {
      float c = tex2D(tex, x, y);
      odata[y*width+x] = c;
   }
}

Below is an example given in Python that computes the product of two arrays on the GPU. The unofficial Python language bindings can be obtained from PyCUDA.^[20]

import pycuda.compiler as comp
import pycuda.driver as drv
import numpy
import pycuda.autoinit

mod = comp.SourceModule("""
__global__ void multiply_them(float *dest, float *a, float *b)
{
  const int i = threadIdx.x;
  dest[i] = a[i] * b[i];
}
""")

multiply_them = mod.get_function("multiply_them")

a = numpy.random.randn(400).astype(numpy.float32)
b = numpy.random.randn(400).astype(numpy.float32)

dest = numpy.zeros_like(a)
multiply_them(
        drv.Out(dest), drv.In(a), drv.In(b),
        block=(400,1,1))

print dest-a*b

Additional Python bindings to simplify matrix multiplication operations can be found in the program pycublas.^[21]

import numpy
from pycublas import CUBLASMatrix
A = CUBLASMatrix( numpy.mat([[1,2,3]],[[4,5,6]],numpy.float32) )
B = CUBLASMatrix( numpy.mat([[2,3]],[4,5],[[6,7]],numpy.float32) )
C = A*B
print C.np_mat()

Language bindings[edit]

• Fortran – FORTRAN CUDA, PGI CUDA Fortran Compiler
• Haskell – Data.Array.Accelerate
• IDL – GPULib
• Java – jCUDA, JCuda, JCublas, JCufft
• Lua – KappaCUDA
• Mathematica – CUDALink
• MATLAB – Parallel Computing Toolbox, Distributed Computing Server,^[22] and 3rd party packages like Jacket.
• .NET – CUDA.NET; CUDAfy.NET .NET kernel and host code, CURAND, CUBLAS, CUFFT
• Perl – KappaCUDA, CUDA::Minimal
• Python – PyCUDA, KappaCUDA
• Ruby – KappaCUDA

Current CUDA architectures[edit]

The current generation CUDA architecture (codename: Fermi) which is standard on Nvidia's released (GeForce 400 Series [GF100] (GPU) 2010-03-27)^[23] GPU is designed from the ground up to natively support more programming languages such as C++. It has significantly increased the peak double-precision floating-point performance compared to Nvidia's prior-generation Tesla GPU. It also introduced several new features^[24] including:

• up to 1024 CUDA cores and 6.0 billion transistors on the GTX 590
• Nvidia Parallel DataCache technology
• Nvidia GigaThread engine
• ECC memory support
• Native support for Visual Studio

Current and future usages of CUDA architecture[edit]

• Accelerated rendering of 3D graphics
• Accelerated interconversion of video file formats
• Accelerated encryption, decryption and compression
• Distributed calculations, such as predicting the native conformation of proteins
• Medical analysis simulations, for example virtual reality based on CT and MRI scan images.
• Physical simulations, in particular in fluid dynamics.
• Distributed computing

See also[edit]

• GPGPU – general purpose computation on GPUs
• OpenCL – The cross-platform standard supported by both NVidia and AMD/ATI
• DirectCompute – Microsoft API for GPU Computing in Windows Vista and Windows 7
• BrookGPU – the Stanford University graphics group's compiler
• Vectorization (parallel computing)
• Stream processing
• rCUDA – An API for computing on remote computers
• Molecular modeling on GPU

External links[edit]

• Official website

Nvidia

 

[hide]

Graphics processing units

 

Early chipsets	NV1 NV2
RIVA series	RIVA 128 RIVA TNT RIVA TNT2
GeForce series	GeForce 256 2 3 4 5 6 7 8 9 100 200 300 400 500 600 700 800 900 1000 1100
Other series	Quadro series Quadro Plex Tesla series
Technologies	nView 3D Vision SLI Optimus TurboCache CUDA PhysX OptiX SceniX CompleX
Multimedia Acceleration Technologies	High-Definition Video Processor Video Processing Engine PureVideo

 

[hide]

Motherboard chipsets

 

GeForce Series	ION 8 9
nForce Series	nForce 220/415/420 nForce2 nForce3 nForce4 nForce 500 nForce 600 nForce 700 nForce 900
Technologies	ESA EPP LinkBoost MXM SoundStorm

 

[hide]

Other products

 

Consoles	NV2A (Xbox) RSX (PlayStation 3) Nvidia Shield
CPUs	Project Denver
Bridge chips	BR02 BR03 BR04 NF200
Handheld	GoForce Tegra
Software	ForceWare System Tools Gelato Cg VDPAU
Acquisitions	3dfx Interactive Ageia ULi Mental Images PortalPlayer Exluna MediaQ

 

CPU technologies
Architecture	Harvard Modified Harvard von Neumann Dataflow Comparison
Instruction set	ASIP CISC EDGE EPIC MISC OISC RISC VLIW NISC ZISC
Word size	1-bit 4-bit 8-bit 9-bit 10-bit 12-bit 15-bit 16-bit 18-bit 22-bit 24-bit 25-bit 26-bit 27-bit 31-bit 32-bit 33-bit 34-bit 36-bit 39-bit 40-bit 48-bit 50-bit 60-bit 64-bit 128-bit 256-bit 512-bit variable
Pipeline	Instruction pipelining In-order & out-of-order execution Branch predictor Register renaming Speculative execution Hazards Bubble
Parallel level	Bit Bit-serial Word Instruction  Scalar Superscalar Data  Vector Task  Thread
Multithreading	Temporal multithreading Simultaneous multithreading  Hyper-threading
Flynn's taxonomy	SISD SIMD MISD MIMD  SPMD
Types	Digital signal processor Microcontroller System on a chip Cellular
Components	Arithmetic logic unit Barrel shifter Floating-point unit Back-side bus Multiplexer Demultiplexer Registers Memory management unit Translation lookaside buffer Cache Register file Microcode Control unit Clock rate
Power management	APM ACPI Dynamic frequency scaling Dynamic voltage scaling Clock gating

Parallel computing
General	Cloud computing High-performance computing Cluster computing Distributed computing Grid computing
Levels	Bit Instruction Data Task
Multithreading	Temporal multithreading Simultaneous multithreading  Hyper-threading
Theory	Amdahl's law Gustafson's law Cost efficiency Karp–Flatt metric slowdown speedup
Elements	Process Thread Fiber PRAM Instruction window
Coordination	Multiprocessing Memory coherency Cache coherency Cache invalidation Barrier Synchronization Application checkpointing
Programming	Models Implicit parallelism Explicit parallelism Concurrency Flynn's taxonomy  SISD SIMD MISD MIMD  SPMD Thread Non-blocking algorithm
Hardware	Multiprocessor Symmetric Asymmetric Memory  NUMA COMA distributed shared distributed shared MPP Superscalar Vector processor Supercomputer Beowulf cluster
APIs	Ateji PX POSIX Threads OpenMP OpenHMPP OpenACC PVM MPI UPC TBB Boost.Thread Global Arrays Charm++ Cilk/Cilk Plus Coarray Fortran OpenCL CUDA Dryad C++ AMP
Problems	Embarrassingly parallel Software lockout Scalability Race condition Deadlock Livelock Starvation Deterministic algorithm Parallel slowdown