HDL代码风格建议（1）使用示例和IP

Recommended HDL Coding Styles

HDL coding styles can have a significant effect on the quality of results that you achieve for programmable logic designs. Synthesis tools optimize HDL code for both logic utilization and performance; however, synthesis tools have no information about the purpose or intent of the design. The best optimizations require your conscious interaction.

Using Provided HDL Templates

Altera provides templates for Verilog HDL, SystemVerilog, and VHDL. Many of the HDL examples in this document correspond with theFull Designs examples in the Quartus Prime Templates.

Inserting a HDL Code from the Template

Instantiating IP Cores in HDL

Alternatively, you can use the IP Catalog (Tools > IP Catalog) and parameter editor GUI to simplify customization of your IP core variation.