由于自己手头暂时没有开发板,因此本节没有测试,故告之。

Connecting to ZedBoard

Before we can run the application we have to connect to our ZedBoard. Here is a list of things to do:

  1. Connect the power cable to the ZedBoard
  2. Connect two micro-USB cables between the host computer and the ZedBoard connectors J17 (JTAG) and J14 (UART)
  3. Set jumpers to Cascaded JTAG Mode MIO[6:2] = GND
  4. Power on the ZedBoard
  5. Install JTAG cable drivers
  6. Setup a terminal emulator

ZedBoard USB ports

Programming port (JTAG)

 

UART port

 

 

ZedBoard jumpers

 

 

ZedBoard connected

 

 

USB plug and play

We all know that connecting an USB device to our computer is "plug and play". When inserting a memory flash card it just pops up on our computer screen. Connecting a Xilinx development board is not always plug and play. Especially not if we are using Ubuntu Linux. Since I started playing with Xilinx boards I have had a hard time to get the USB functionality to work, both the JTAG programming and connecting a terminal through the UART USB port. Has anything changed with the new Vivado software? Let's power on the ZedBoard and find out.

USB ports in Mac OS X

After powering on the ZedBoard we should see the two USB ports called something like this:

  • Digilent USB Device (JTAG port)
  • 2012 Cypress Semiconductor Cypress-USB2UART (UART port)

The system report shows us the following information about the connected USB ports.

 

Enable USB ports in VirtualBox

To enable the two USB ports in VirtualBox select Settings

 

and then Ports and USB.

 

 

Click the + button and add the two ports. If you don't see both ports try to unplug and plug in the USB cables with the ZedBoard still powered on. Now we can return to Ubuntu Linux.

 

Using lsusb

The Linux command lsusb will tell us which USB ports are available.

Device 005 (USB to UART) and 006 (USB to JTAG) are the two USB ports we are using.

 

Install Digilent Adept JTAG drivers

Xilinx uses software from Digilent to configure Xilinx logic devices, initialize scan chains, program FPGAs, CLPDs and PROM. We will go to the Digilent web page and download all software from there. I know that some of this software is hidden somewhere in the SDK installation (/opt/Xilinx/SDK/2013.4/data/xicom/cable_drivers) but I prefer to do this installation from scratch and try to understand what is going on.

Digilent Adept

We will install the following 64bit applications:

Adept 2.15.3 Runtime, X64 Linux

Adept 2.1.1 Utilities, X64 Linux

Digilent Plugins for Xilinx Tools

We will install the following 64bit application:

Digilent Plug-in, 64bit Linux

 

The following files have been downloaded.

 

After unzipping and unpacking the file structure looks like this.

 

 

Installing Digilent Adept software

To install the Digilent Adept software we will run the three install scripts and copy the plugins to the SDK installation directory.

cd $HOME/Downloads/digilent.adept_runtime_2.15.3-x86_64

sudo sh ./install.sh

cd ftdi.drivers_1.0.4-x86_64

sudo sh ./install.sh

cd $HOME/Downloads/digilent.adept_utilities_2.1.1-x86_64

sudo sh ./install.sh

Let the installer put everything in default locations.

When using the latest version of Digilent Adept the following files have been downloaded.

Use the following commands to install the deb files:

-> sudo dpkg -i digilent.adept_runtime_2.16.1-2_amd64.deb

-> sudo dpkg -i digilent.adept_utilities_2.2.1-amd64.deb

 

Copy Digilent plugins

We will copy the plugins to the directory:

/opt/Xilinx/SDK/2013.4/lib/lin64/plugins/Digilent/libCseDigilent

When using Vivado 2015.1 the plugin files will be placed here.

Here is the answer from Xilinx forum. I don't know if this is the right place. You can try both solutions.
 Put them in the following location: "<Xilinx_vivado_installed_directory>/Xilinx/Vivado/<version>/data/xicom/vcse_plugins/lnx64.g/Digilent/libCseDigilent" folder

The rules file 52-digilent-usb.rules has been installed in the directory /etc/udev/rules.d


Finish the installation

Before we can use the Digilent cable drivers we have to reboot Ubuntu Linux or run this command to initialize the new udev rules file:

sudo udevadm control --reload-rules


Digilent JTAG Config Utility program

Included in the Digilent Adept installation is a command-line program called "djtgcfg" (who came up with this name). We can use this program to test if the JTAG connection to the ZedBoard works.

Use this command to discover and list the board connected:

djtgcfg enum

Congratulations! We have established a connection with our ZedBoard.

Summary

It wasn't exactly "plug and play". Without a working connection between our computer and the development board, Xilinx software and hardware is useless. Installing the JTAG cable drivers is a major stumbling block for many Linux users. I think it is high time to make it 100% "plug and play", once and forever.

(转) 使用vivado创建工程 4[完结]的更多相关文章

  1. (转) 使用vivado创建工程 3

    Create a Hello World application In this experiment we will use Xilinx SDK to create a simple Hello ...

  2. (转) 使用vivado创建工程 2

    Build the hardware platform and export to SDK A basic ARM hardware platform is now configured. The c ...

  3. (转) 使用vivado创建工程 1

    此文全文转自:http://svenand.blogdrive.com/archive/169.html#.WaUV9IiGNPY  ,非常感谢! 本人在vivado 2015.4版本测试! When ...

  4. Vivado如何使用命令行创建工程

    前言 vivado中采用TCL脚本语言来作为其命令解释语言.除去可以普通的图形界面流程还可以使用tcl脚本创建工程并导入相关源文件.   流程 1.首先还是要打开vivado图形主界面. 2.在某路径 ...

  5. xilinx Vivado的使用详细介绍(2):创建工程、添加文件、综合、实现、管脚约束、产生比特流文件、烧写程序、硬件验证

    xilinx Vivado的使用详细介绍(2):创建工程.添加文件.综合.实现.管脚约束.产生比特流文件.烧写程序.硬件验证 Author:zhangxianhe 新建工程 打开Vivado软件,直接 ...

  6. Xilinx Vivado的使用详细介绍(1):创建工程、编写代码、行为仿真

    Xilinx Vivado的使用详细介绍(1):创建工程.编写代码.行为仿真 Author:zhangxianhe 新建工程 打开Vivado软件,直接在欢迎界面点击Create New Projec ...

  7. vivado 创建PS工程

    前言 本文简要介绍在vivado中创建PS工程.单纯使用zynq芯片的PS部分就像使用普通ARM芯片一样,只是多了建立Zynq硬件系统这一个步骤.vivado创建PL工程参见此处 新建工程 与viva ...

  8. vivado 创建PL工程

    参考来源 https://china.xilinx.com/video/hardware/i-and-o-planning-overview.html 前言 我Win10系统上的Xilinx Plat ...

  9. FPGA开发流程(创建工程,选择芯片,变量位置,文件命名,reg和wire数据类型,开发流程)

    开发流程(以二选一选择器为例) 1.设计定义:设计一个可以从两个输入端中选择其中一个并输出的逻辑电路 2.设计输入 2.1.逻辑抽象:三个输入端,一个用来选择,记sel,另两个被选择,记a,b,加上一 ...

随机推荐

  1. <力荐>非常好的正则表达式的详解<力荐>

    正则表达式(regular expression)描述了一种字符串匹配的模式,可以用来检查一个串是否含有某种子串.将匹配的子串做替换或者从某个串中取出符合某个条件的子串等. 列目录时, dir *.t ...

  2. scrum立会报告+燃尽图(第二周第四次)

    此作业要求参考: https://edu.cnblogs.com/campus/nenu/2018fall/homework/2249 一.小组介绍 组名:杨老师粉丝群 组长:乔静玉 组员:吴奕瑶.公 ...

  3. Android 中的广播机制

    Android 中的广播机制 Android 中的广播,按照广播响应范围,可以分为应用内广播和全局广播.按照广播的接收方式,可以分为标准广播和有序广播. 广播的分类 响应范围 应用内广播:此类广播只能 ...

  4. Centos 关闭图形界面

    查看/etc/inittab如下: # systemd uses 'targets' instead of runlevels. # by default, there are two main ta ...

  5. ASP.NET MVC5 学习系列之视图

    一.视图约定 当创建一个项目模版时,可以注意到,项目以一种非常具体的方式包含了一个结构化的Views目录.在每一个控制器的View文件夹中,每一个操作方法都有一个同名的视图文件与其对应.(约定大于配置 ...

  6. OpenFlow协议

    功能 1.0版本Openflow:控制器通过Openflow协议与交换机建立了安全通道(Sceure Channel),下发流表. 1.3版本Openflow:多控制器,多流表. 用于实现Contro ...

  7. 【c】线性表

    数据对象集:线性表是N(>=0)个元素构成的有序序列,a1,a2,a3.....a(N-1),aN,a(N+1) 线性表上的基本操作有: ⑴ 线性表初始化:Init_List(L)初始条件:表L ...

  8. 关于SIGPIPE信号

    对一个对端已经关闭的socket调用两次write, 第二次将会生成SIGPIPE信号, 该信号默认结束进程.具体的分析可以结合TCP的"四次握手"关闭. TCP是全双工的信道, ...

  9. Dbgrid控件多重选择的怪问题。BookMarkList,BookMark,使用书签,用的ADOQuery控件。100分送上,急阿!!!请高手帮忙!

    Dbgrid控件多重选择的怪问题.BookMarkList,BookMark,使用书签,用的ADOQuery控件.100分送上,急阿!!!请高手帮忙! ( 积分: 100 )<br />p ...

  10. FZU2127_养鸡场

    题目的意思为要你求出满足三边范围条件且周长为n的三角形的数目. 其实做法是直接枚举最短边,然后就可以知道第二条边的取值范围,同时根据给定的范围缩小范围. 同时根据第二条边的范围推出第三条边的范围,再次 ...