移植u-boot-2012.04.01到JZ2440
开发环境:Ubuntu 12.04
开发板:JZ2440 256M NandFlash 64M SDRAM
交叉编译器:arm-linux-gcc-4.3.2
u-boot:u-boot-2012.04.01
|
tar xjf u-boot-2012.04..tar.bz2
进入解压后文件目录
cd u-boot-2012.04.
2、在解压后文件目录下根据靠近的单板,配置
make smdk2410_config
make
这个时候编译完成后是不能在JZ2440上正常运行
三、建立自己的单板,定制适合自己单板的bootloader
1、新建一个单板
cd board/samsung/
cp smdk2410 smdk2440 -rf
cd ../../include/configs/
cp smdk2410.h smdk2440.h
smdk2410 arm arm920t - samsung s3c24x0
添加
smdk2440 arm arm920t - samsung s3c24x0
make , 烧写调试
2、根据需求进一步配置
make menuconfig
3、修改Makefile ,开头指定架构和编译器
ARCH=arm
CROSS_COMPILE=arm-linux-
/* to reduce PLL lock time, adjust the LOCKTIME register */
//writel(0xFFFFFF, &clk_power->locktime); /* configure MPLL */
//writel((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV,
// &clk_power->mpllcon);
然后在start.S中再设置MPLL
#define S3C2440_MPLL_400MHZ ((0x5c<<12)|(0x01<<4)|(0x01))
#if 0
/* FCLK:HCLK:PCLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #
str r1, [r0]
#else
/* 2. 设置时钟 400MHz */
ldr r0, =0x4c000014
// mov r1, #0x03; // FCLK:HCLK:PCLK=1:2:4, HDIVN=1,PDIVN=1
mov r1, #0x05; // FCLK:HCLK:PCLK=1:4:8
str r1, [r0]
/* 如果HDIVN非0,CPU的总线模式应该从“fast bus mode”变为“asynchronous bus mode” */
mrc p15, , r1, c1, c0, /* 读出控制寄存器 */
orr r1, r1, #0xc0000000 /* 设置为“asynchronous bus mode” */
mcr p15, , r1, c1, c0, /* 写入控制寄存器 */ #define S3C2440_MPLL_400MHZ ((0x5c<<12)|(0x01<<4)|(0x01))
/* MPLLCON = S3C2440_MPLL_200MHZ */
ldr r0, =0x4c000004
ldr r1, =S3C2440_MPLL_400MHZ
str r1, [r0] /* 启动ICACHE */
mrc p15, , r0, c1, c0, @ read control reg
orr r0, r0, #(<<)
mcr p15, , r0, c1, c0, @ write it back
#endif
关闭看门狗、关中断
#define S3C2440_MPLL_400MHZ ((0x5c<<12)|(0x01<<4)|(0x01))
#if 0
/* FCLK:HCLK:PCLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #
str r1, [r0]
#else
/* 2. 设置时钟 400MHz */
ldr r0, =0x4c000014
// mov r1, #0x03; // FCLK:HCLK:PCLK=1:2:4, HDIVN=1,PDIVN=1
mov r1, #0x05; // FCLK:HCLK:PCLK=1:4:8
str r1, [r0]
/* 如果HDIVN非0,CPU的总线模式应该从“fast bus mode”变为“asynchronous bus mode” */
mrc p15, , r1, c1, c0, /* 读出控制寄存器 */
orr r1, r1, #0xc0000000 /* 设置为“asynchronous bus mode” */
mcr p15, , r1, c1, c0, /* 写入控制寄存器 */ #define S3C2440_MPLL_400MHZ ((0x5c<<12)|(0x01<<4)|(0x01))
/* MPLLCON = S3C2440_MPLL_200MHZ */
ldr r0, =0x4c000004
ldr r1, =S3C2440_MPLL_400MHZ
str r1, [r0] /* 启动ICACHE */
mrc p15, , r0, c1, c0, @ read control reg
orr r0, r0, #(<<)
mcr p15, , r0, c1, c0, @ write it back
#endif
关闭看门狗、关中断 #ifdef CONFIG_S3C24X0
/* turn off the watchdog */ # if defined(CONFIG_S3C2400)
# define pWTCON 0x15300000
# define INTMSK 0x14400008 /* Interrupt-Controller base addresses */
# define CLKDIVN 0x14800014 /* clock divisor register */
#else
# define pWTCON 0x53000000
# define INTMSK 0x4A000008 /* Interrupt-Controller base addresses */
# define INTSUBMSK 0x4A00001C
# define CLKDIVN 0x4C000014 /* clock divisor register */
# endif ldr r0, =pWTCON
mov r1, #0x0
str r1, [r0] /*
* mask all IRQs by setting all bits in the INTMR - default
*/
mov r1, #0xffffffff
ldr r0, =INTMSK
str r1, [r0]
# if defined(CONFIG_S3C2410)
ldr r1, =0x3ff
ldr r0, =INTSUBMSK
str r1, [r0]
# endif
#endif
SMRDATA:
#if 0
.word (+(B1_BWSCON<<)+(B2_BWSCON<<)+(B3_BWSCON<<)+(B4_BWSCON<<)+(B5_BWSCON<<)+(B6_BWSCON<<)+(B7_BWSCON<<))
.word ((B0_Tacs<<)+(B0_Tcos<<)+(B0_Tacc<<)+(B0_Tcoh<<)+(B0_Tah<<)+(B0_Tacp<<)+(B0_PMC))
.word ((B1_Tacs<<)+(B1_Tcos<<)+(B1_Tacc<<)+(B1_Tcoh<<)+(B1_Tah<<)+(B1_Tacp<<)+(B1_PMC))
.word ((B2_Tacs<<)+(B2_Tcos<<)+(B2_Tacc<<)+(B2_Tcoh<<)+(B2_Tah<<)+(B2_Tacp<<)+(B2_PMC))
.word ((B3_Tacs<<)+(B3_Tcos<<)+(B3_Tacc<<)+(B3_Tcoh<<)+(B3_Tah<<)+(B3_Tacp<<)+(B3_PMC))
.word ((B4_Tacs<<)+(B4_Tcos<<)+(B4_Tacc<<)+(B4_Tcoh<<)+(B4_Tah<<)+(B4_Tacp<<)+(B4_PMC))
.word ((B5_Tacs<<)+(B5_Tcos<<)+(B5_Tacc<<)+(B5_Tcoh<<)+(B5_Tah<<)+(B5_Tacp<<)+(B5_PMC))
.word ((B6_MT<<)+(B6_Trcd<<)+(B6_SCAN))
.word ((B7_MT<<)+(B7_Trcd<<)+(B7_SCAN))
.word ((REFEN<<)+(TREFMD<<)+(Trp<<)+(Trc<<)+(Tchr<<)+REFCNT)
.word 0x32
.word 0x30
.word 0x30
#else .long 0x22011110 //BWSCON
.long 0x00000700 //BANKCON0
.long 0x00000700 //BANKCON1
.long 0x00000700 //BANKCON2
.long 0x00000700 //BANKCON3
.long 0x00000700 //BANKCON4
.long 0x00000700 //BANKCON5
.long 0x00018005 //BANKCON6
.long 0x00018005 //BANKCON7
.long 0x008C04F4 //REFRESH
.long 0x000000B1 //BANKSIZE
.long 0x00000030 //MRSRB6
.long 0x00000030 //MRSRB7 #endif
c、设置串口波特率(get_HCLK函数),乱码,查看串口波特率的设置,发现在get_HCLK里没有定义CONFIG_S3C2440宏
//#define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
//#define CONFIG_SMDK2410 /* on a SAMSUNG SMDK2410 Board */
#define CONFIG_S3C2440 /* specifically a SAMSUNG S3C2440 SoC */
#define CONFIG_SMDK2440 /* on a SAMSUNG SMDK2440 Board */
arch/arm/config.mk::LDFLAGS_u-boot += -pie 去掉这行
#define CONFIG_SYS_TEXT_BASE 0x33f00000
/* NAND FLASH控制器 */
#define NFCONF (*((volatile unsigned long *)0x4E000000))
#define NFCONT (*((volatile unsigned long *)0x4E000004))
#define NFCMMD (*((volatile unsigned char *)0x4E000008))
#define NFADDR (*((volatile unsigned char *)0x4E00000C))
#define NFDATA (*((volatile unsigned char *)0x4E000010))
#define NFSTAT (*((volatile unsigned char *)0x4E000020)) /* GPIO */
#define GPHCON (*(volatile unsigned long *)0x56000070)
#define GPHUP (*(volatile unsigned long *)0x56000078) /* UART registers*/
#define ULCON0 (*(volatile unsigned long *)0x50000000)
#define UCON0 (*(volatile unsigned long *)0x50000004)
#define UFCON0 (*(volatile unsigned long *)0x50000008)
#define UMCON0 (*(volatile unsigned long *)0x5000000c)
#define UTRSTAT0 (*(volatile unsigned long *)0x50000010)
#define UTXH0 (*(volatile unsigned char *)0x50000020)
#define URXH0 (*(volatile unsigned char *)0x50000024)
#define UBRDIV0 (*(volatile unsigned long *)0x50000028) #define TXD0READY (1<<2) void nand_read(unsigned int addr, unsigned char *buf, unsigned int len); int isBootFromNorFlash(void)
{
volatile int *p = (volatile int *);
int val; val = *p;
*p = 0x12345678;
if (*p == 0x12345678)
{
/* 写成功, 是nand启动 */
*p = val;
return ;
}
else
{
/* NOR不能像内存一样写 */
return ;
}
} void copy_code_to_sdram(unsigned char *src, unsigned char *dest, unsigned int len)
{
int i = ; /* 如果是NOR启动 */
if (isBootFromNorFlash())
{
while (i < len)
{
dest[i] = src[i];
i++;
}
}
else
{
//nand_init();
nand_read((unsigned int)src, dest, len);
}
} void clear_bss(void)
{
extern int __bss_start, __bss_end;
int *p = &__bss_start; for (; p < &__bss_end; p++)
*p = ;
} void nand_init(void)
{
#define TACLS 0
#define TWRPH0 1
#define TWRPH1 0
/* 设置时序 */
NFCONF = (TACLS<<)|(TWRPH0<<)|(TWRPH1<<);
/* 使能NAND Flash控制器, 初始化ECC, 禁止片选 */
NFCONT = (<<)|(<<)|(<<);
} void nand_select(void)
{
NFCONT &= ~(<<);
} void nand_deselect(void)
{
NFCONT |= (<<);
} void nand_cmd(unsigned char cmd)
{
volatile int i;
NFCMMD = cmd;
for (i = ; i < ; i++);
} void nand_addr(unsigned int addr)
{
unsigned int col = addr % ;
unsigned int page = addr / ;
volatile int i; NFADDR = col & 0xff;
for (i = ; i < ; i++);
NFADDR = (col >> ) & 0xff;
for (i = ; i < ; i++); NFADDR = page & 0xff;
for (i = ; i < ; i++);
NFADDR = (page >> ) & 0xff;
for (i = ; i < ; i++);
NFADDR = (page >> ) & 0xff;
for (i = ; i < ; i++);
} void nand_wait_ready(void)
{
while (!(NFSTAT & ));
} unsigned char nand_data(void)
{
return NFDATA;
} void nand_read(unsigned int addr, unsigned char *buf, unsigned int len)
{
int col = addr % ;
int i = ; /* 1. 选中 */
nand_select(); while (i < len)
{
/* 2. 发出读命令00h */
nand_cmd(0x00); /* 3. 发出地址(分5步发出) */
nand_addr(addr); /* 4. 发出读命令30h */
nand_cmd(0x30); /* 5. 判断状态 */
nand_wait_ready(); /* 6. 读数据 */
for (; (col < ) && (i < len); col++)
{
buf[i] = nand_data();
i++;
addr++;
} col = ;
} /* 7. 取消选中 */
nand_deselect();
} #define PCLK 50000000 // init.c中的clock_init函数设置PCLK为50MHz
#define UART_CLK PCLK // UART0的时钟源设为PCLK
#define UART_BAUD_RATE 115200 // 波特率
#define UART_BRD ((UART_CLK / (UART_BAUD_RATE * 16)) - 1) /*
* 初始化UART0
* 115200,8N1,无流控
*/
void uart0_init(void)
{
GPHCON |= 0xa0; // GPH2,GPH3用作TXD0,RXD0
GPHUP = 0x0c; // GPH2,GPH3内部上拉 ULCON0 = 0x03; // 8N1(8个数据位,无较验,1个停止位)
UCON0 = 0x05; // 查询方式,UART时钟源为PCLK
UFCON0 = 0x00; // 不使用FIFO
UMCON0 = 0x00; // 不使用流控
UBRDIV0 = UART_BRD; // 波特率为115200
} /*
* 发送一个字符
*/
void putc(unsigned char c)
{
/* 等待,直到发送缓冲区中的数据已经全部发送出去 */
while (!(UTRSTAT0 & TXD0READY)); /* 向UTXH0寄存器中写入数据,UART即自动将它发送出去 */
UTXH0 = c;
} void puts(char *str)
{
int i = ;
while (str[i])
{
putc(str[i]);
i++;
}
} void puthex(unsigned int val)
{
/* 0x1234abcd */
int i;
int j; puts("0x"); for (i = ; i < ; i++)
{
j = (val >> ((-i)*)) & 0xf;
if ((j >= ) && (j <= ))
putc('' + j);
else
putc('A' + j - 0xa); } }
board/samsung/smdk2440/libsmdk2440.o
/*
* reserve memory for U-Boot code, data & bss
* round down to next 4 kB limit
*/
//addr -= gd->mon_len;
//addr &= ~(4096 - 1);
addr = CONFIG_SYS_TEXT_BASE;
base_sp = addr_sp;
//relocate_code(addr_sp, id, addr);
return ( unsigned int )id;
/* NOTREACHED - relocate_code() does not return */
f、支持NOR-FLASH: 在drivers\mtd\jedec_flash.c 加上新的型号, jedec_table[] 中增加一项匹配板子上的NOR-Flash厂商ID和设备ID
static const struct amd_flash_info jedec_table[] = {
#ifdef CONFIG_SYS_FLASH_LEGACY_256Kx8
{
.mfr_id = (u16)SST_MANUFACT,
.dev_id = SST39LF020,
.name = "SST 39LF020",
.uaddr = {
[] = MTD_UADDR_0x5555_0x2AAA /* x8 */
},
.DevSize = SIZE_256KiB,
.CmdSet = P_ID_AMD_STD,
.NumEraseRegions= ,
.regions = {
ERASEINFO(0x01000,),
}
},
#endif
#ifdef CONFIG_SYS_FLASH_LEGACY_512Kx8
{
.mfr_id = (u16)AMD_MANUFACT,
.dev_id = AM29LV040B,
.name = "AMD AM29LV040B",
.uaddr = {
[] = MTD_UADDR_0x0555_0x02AA /* x8 */
},
.DevSize = SIZE_512KiB,
.CmdSet = P_ID_AMD_STD,
.NumEraseRegions= ,
.regions = {
ERASEINFO(0x10000,),
}
},
{
.mfr_id = (u16)SST_MANUFACT,
.dev_id = SST39LF040,
.name = "SST 39LF040",
.uaddr = {
[] = MTD_UADDR_0x5555_0x2AAA /* x8 */
},
.DevSize = SIZE_512KiB,
.CmdSet = P_ID_AMD_STD,
.NumEraseRegions= ,
.regions = {
ERASEINFO(0x01000,),
}
},
{
.mfr_id = (u16)STM_MANUFACT,
.dev_id = STM_ID_M29W040B,
.name = "ST Micro M29W040B",
.uaddr = {
[] = MTD_UADDR_0x0555_0x02AA /* x8 */
},
.DevSize = SIZE_512KiB,
.CmdSet = P_ID_AMD_STD,
.NumEraseRegions= ,
.regions = {
ERASEINFO(0x10000,),
}
},
{
.mfr_id = (u16)MX_MANUFACT,
.dev_id = MX29LV040,
.name = "MXIC MX29LV040",
.uaddr = {
[] = MTD_UADDR_0x0555_0x02AA /* x8 */
},
.DevSize = SIZE_512KiB,
.CmdSet = P_ID_AMD_STD,
.NumEraseRegions= ,
.regions = {
ERASEINFO(0x10000, ),
}
},
{
.mfr_id = (u16)WINB_MANUFACT,
.dev_id = W39L040A,
.name = "WINBOND W39L040A",
.uaddr = {
[] = MTD_UADDR_0x5555_0x2AAA /* x8 */
},
.DevSize = SIZE_512KiB,
.CmdSet = P_ID_AMD_STD,
.NumEraseRegions= ,
.regions = {
ERASEINFO(0x10000, ),
}
},
{
.mfr_id = (u16)AMIC_MANUFACT,
.dev_id = A29L040,
.name = "AMIC A29L040",
.uaddr = {
[] = MTD_UADDR_0x0555_0x02AA /* x8 */
},
.DevSize = SIZE_512KiB,
.CmdSet = P_ID_AMD_STD,
.NumEraseRegions= ,
.regions = {
ERASEINFO(0x10000, ),
}
},
{
.mfr_id = (u16)EON_MANUFACT,
.dev_id = EN29LV040A,
.name = "EON EN29LV040A",
.uaddr = {
[] = MTD_UADDR_0x0555_0x02AA /* x8 */
},
.DevSize = SIZE_512KiB,
.CmdSet = P_ID_AMD_STD,
.NumEraseRegions= ,
.regions = {
ERASEINFO(0x10000, ),
}
},
#endif
#ifdef CONFIG_SYS_FLASH_LEGACY_512Kx16
{
.mfr_id = (u16)AMD_MANUFACT,
.dev_id = AM29F400BB,
.name = "AMD AM29F400BB",
.uaddr = {
[] = MTD_UADDR_0x0555_0x02AA /* x16 */
},
.DevSize = SIZE_512KiB,
.CmdSet = CFI_CMDSET_AMD_LEGACY,
.NumEraseRegions= ,
.regions = {
ERASEINFO(0x04000, ),
ERASEINFO(0x02000, ),
ERASEINFO(0x08000, ),
ERASEINFO(0x10000, ),
}
},
{
.mfr_id = (u16)AMD_MANUFACT,
.dev_id = AM29LV400BB,
.name = "AMD AM29LV400BB",
.uaddr = {
[] = MTD_UADDR_0x0555_0x02AA /* x16 */
},
.DevSize = SIZE_512KiB,
.CmdSet = CFI_CMDSET_AMD_LEGACY,
.NumEraseRegions= ,
.regions = {
ERASEINFO(0x04000,),
ERASEINFO(0x02000,),
ERASEINFO(0x08000,),
ERASEINFO(0x10000,),
}
},
{
.mfr_id = (u16)AMD_MANUFACT,
.dev_id = AM29LV800BB,
.name = "AMD AM29LV800BB",
.uaddr = {
[] = MTD_UADDR_0x0555_0x02AA /* x16 */
},
.DevSize = SIZE_1MiB,
.CmdSet = CFI_CMDSET_AMD_LEGACY,
.NumEraseRegions= ,
.regions = {
ERASEINFO(0x04000, ),
ERASEINFO(0x02000, ),
ERASEINFO(0x08000, ),
ERASEINFO(0x10000, ),
}
},
{
.mfr_id = (u16)STM_MANUFACT,
.dev_id = STM29F400BB,
.name = "ST Micro M29F400BB",
.uaddr = {
[] = MTD_UADDR_0x0555_0x02AA /* x16 */
},
.DevSize = SIZE_512KiB,
.CmdSet = CFI_CMDSET_AMD_LEGACY,
.NumEraseRegions = ,
.regions = {
ERASEINFO(0x04000, ),
ERASEINFO(0x02000, ),
ERASEINFO(0x08000, ),
ERASEINFO(0x10000, ),
}
},
#endif //JZ2440
{
.mfr_id = (u16)MX_MANUFACT,
.dev_id = 0x2249,
.name = "MXIC MX29LV160DB",
.uaddr = {
[] = MTD_UADDR_0x0555_0x02AA /* x16 */
},
.DevSize = SIZE_2MiB,
.CmdSet = P_ID_AMD_STD,
.NumEraseRegions= ,
.regions = {
ERASEINFO(*,),
ERASEINFO(*,),
ERASEINFO(*,),
ERASEINFO(*,),
}
} };
#define CONFIG_SYS_MAX_FLASH_SECT (128)
验证是否支持Nor flash
flinfo : 查看flash信息,RO块通过"protect off all"指令后擦写。
测试一下norflash能否正确读写,用以下u-boot命令: cp.b 0 30000000 80 |
/* Set stackpointer in internal RAM to call board_init_f */ call_board_init_f: ldr r0,=0x00000000
bl board_init_f /* unsigned int的值存在r0,正好给board_init_r作为参数用 */
ldr r1,_TEXT_BASE
ldr sp,base_sp
/* 调用第二阶段的代码 */
bl board_init_r .globl base_sp
base_sp:
.long
启动cache后就初始化nandflash
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
bic sp, sp, # /* 8-byte alignment for ABI compliance */ bl nand_init_ll
static void s3c2440_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *chip = mtd->priv;
struct s3c2440_nand *nand = s3c2440_get_base_nand();
if( ctrl&NAND_CLE)
{
/* 发命令 */
writeb(cmd,&nand->nfcmd);
}
else if( ctrl&NAND_ALE)
{
/* 发地址 */
writeb(cmd,&nand->nfaddr);
} }
int board_nand_init(struct nand_chip *nand)
{
u_int32_t cfg;
u_int8_t tacls, twrph0, twrph1;
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
struct s3c2440_nand *nand_reg = s3c2440_get_base_nand(); debug("board_nand_init()\n"); writel(readl(&clk_power->clkcon) | ( << ), &clk_power->clkcon); /* initialize hardware */
#if defined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING)
tacls = CONFIG_S3C24XX_TACLS;
twrph0 = CONFIG_S3C24XX_TWRPH0;
twrph1 = CONFIG_S3C24XX_TWRPH1;
#else
tacls = ;
twrph0 = ;
twrph1 = ;
#endif
#if 0
cfg = S3C2410_NFCONF_EN;
cfg |= S3C2410_NFCONF_TACLS(tacls - );
cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - );
cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - );
#endif
/* 设置时序 */
cfg = ((tacls-)<<)|((twrph0-)<<)|((twrph1-)<<);
writel(cfg, &nand_reg->nfconf);
/* 使能NAND Flash控制器, 初始化ECC, 禁止片选 */
writel((<<)|(<<)|(<<), &nand_reg->nfcont); /* initialize nand_chip data structure */
nand->IO_ADDR_R = (void *)&nand_reg->nfdata;
nand->IO_ADDR_W = (void *)&nand_reg->nfdata; nand->select_chip = s3c2440_nand_select; /* read_buf and write_buf are default */
/* read_byte and write_byte are default */
#ifdef CONFIG_NAND_SPL
nand->read_buf = nand_read_buf;
#endif /* hwcontrol always must be implemented */
nand->cmd_ctrl = s3c2440_hwcontrol; nand->dev_ready = s3c2440_dev_ready; #ifdef CONFIG_S3C2410_NAND_HWECC
nand->ecc.hwctl = s3c2410_nand_enable_hwecc;
nand->ecc.calculate = s3c2410_nand_calculate_ecc;
nand->ecc.correct = s3c2410_nand_correct_data;
nand->ecc.mode = NAND_ECC_HW;
nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
#else
nand->ecc.mode = NAND_ECC_SOFT;
#endif #ifdef CONFIG_S3C2410_NAND_BBT
nand->options = NAND_USE_FLASH_BBT;
#else
nand->options = ;
#endif debug("end of nand_init\n"); return ;
}
#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
{
int rc = ;
#ifdef CONFIG_CS8900
rc = cs8900_initialize(, CONFIG_CS8900_BASE);
#endif
#ifdef CONFIG_DRIVER_DM9000
rc = dm9000_initialize(&bis);
#endif
return rc;
}
#endif
配置文件smdk2440.h修改如下:
/*
* Hardware drivers
*/ #if 0
#define CONFIG_CS8900 /* we have a CS8900 on-board */
#define CONFIG_CS8900_BASE 0x19000300
#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
#else
#define CONFIG_DRIVER_DM9000
#define CONFIG_DM9000_BASE 0x20000000
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA CONFIG_DM9000_BASE + 4 #endif
设置CONFIG_ETHADDR宏,根据自己情况配置
#define CONFIG_ETHADDR 00:0c:29:8d:73:b1
保存,编译,烧写,启动Uboot,网卡正常启动。
#if 0
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000)
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SIZE 0x10000
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#endif
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET 0x00040000
#define CONFIG_ENV_SIZE 0x20000
#define CONFIG_ENV_RANGE CONFIG_ENV_SIZE #define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define MTDIDS_DEFAULT "nand0=jz2440-0" /* 哪一个设备 */ #define MTDPARTS_DEFAULT "mtdparts=jz2440-0:256k(bootloader)," \
"128k(params)," \
"4m(kernel)," \
"-(rootfs)" \
至此u-boot的移植基本完成。
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