转载请注明出处：https://www.cnblogs.com/lialong1st/p/8515135.html

CPU：RK3288

系统：Android 5.1

RK3288 查看 ddr 当前频率的方式有两种，第一种是通过 adb 查看，第二种是在串口打印中通过指令查看

1、通过 adb 查看

$ adb shell

root@rk3288:/ # cd sys/kernel/debug/clk

cd sys/kernel/debug/clk

root@rk3288:/sys/kernel/debug/clk # cat clk_summary |grep ddr

cat clk_summary |grep ddr

       clk_ddr

2、在串口打印中通过指令查看当前ddr频率可以，但是adb中是看不到的。

shell@firefly:/ $ cd sys/dvfs

shell@firefly:/sys/dvfs $ ls

cpu_temp_enable

cpu_temp_target

dvfs_tree

shell@firefly:/sys/dvfs $ cat dvfs_tree

/system/bin/sh: cat: dvfs_tree: Permission denied     // 没有权限

|shell@firefly:/sys/dvfs $ su     // 获取root权限

shell@firefly:/sys/dvfs # cat dvfs_tree

[ 107.795152] -------------DVFS TREE-----------

[ 107.795152]

[ 107.795152]

[ 107.795205] DVFS TREE:

[ 107.795220] |

[ 107.795220] |- voltage domain:vd_gpu

[ 107.795239] |- current voltage:

[ 107.795252] |- current regu_mode:UNKNOWN

[ 107.795269] | |

[ 107.795269] | |- power domain:pd_gpu, status = OFF, current volt = , current regu_mode = UNKNOWN

[ 107.795295] | | |

[ 107.795295] | | |- clock: clk_gpu current: rate , volt = , enable_dvfs = ENABLE

[ 107.795321] | | |- clk limit(enable):[, ]; last set rate =

[ 107.795336] | | | |- freq = , volt =

[ 107.795350] | | | |- freq = , volt =

[ 107.795363] | | | |- freq = , volt =

[ 107.795377] | | | |- freq = , volt =

[ 107.795392] | | |- clock: clk_gpu current: rate , regu_mode = UNKNOWN, regu_mode_en =

[ 107.795407] |

[ 107.795407] |- voltage domain:vd_logic

[ 107.795425] |- current voltage:

[ 107.795437] |- current regu_mode:UNKNOWN

[ 107.795452] | |

[ 107.795452] | |- power domain:pd_vio, status = OFF, current volt = , current regu_mode = UNKNOWN

[ 107.795476] | | |

[ 107.795476] | | |- clock: aclk_vio1 current: rate , volt = , enable_dvfs = ENABLE

[ 107.795501] | | |- clk limit(enable):[, ]; last set rate =

[ 107.795516] | | | |- freq = , volt =

[ 107.795530] | | | |- freq = , volt =

[ 107.795545] | | |- clock: aclk_vio1 current: rate , regu_mode = UNKNOWN, regu_mode_en =

[ 107.795563] | |

[ 107.795563] | |- power domain:pd_ddr, status = OFF, current volt = , current regu_mode = UNKNOWN

[ 107.795587] | | |

[ 107.795587] | | |- clock: clk_ddr current: rate , volt = , enable_dvfs = ENABLE     // 456000为ddr频率，单位为KHz

[ 107.795612] | | |- clk limit(enable):[, ]; last set rate =

[ 107.795626] | | | |- freq = , volt =

[ 107.795640] | | | |- freq = , volt =

[ 107.795653] | | | |- freq = , volt =

[ 107.795666] | | | |- freq = , volt =

[ 107.795682] | | |- clock: clk_ddr current: rate , regu_mode = UNKNOWN, regu_mode_en =

[ 107.795696] |

[ 107.795696] |- voltage domain:vd_arm

[ 107.795714] |- current voltage:

[ 107.795726] |- current regu_mode:UNKNOWN

[ 107.795740] | |

[ 107.795740] | |- power domain:pd_core, status = OFF, current volt = , current regu_mode = UNKNOWN

[ 107.795765] | | |

[ 107.795765] | | |- clock: clk_core current: rate , volt = , enable_dvfs = ENABLE

[ 107.795789] | | |- clk limit(enable):[, ]; last set rate =

[ 107.795804] | | | |- freq = , volt =

[ 107.795817] | | | |- freq = , volt =

[ 107.795830] | | | |- freq = , volt =

[ 107.795843] | | | |- freq = , volt =

[ 107.795856] | | | |- freq = , volt =

[ 107.795869] | | | |- freq = , volt =

[ 107.795882] | | | |- freq = , volt =

[ 107.795895] | | | |- freq = , volt =

[ 107.795909] | | | |- freq = , volt =

[ 107.795922] | | | |- freq = , volt =

[ 107.795936] | | | |- freq = , volt =

[ 107.795949] | | | |- freq = , volt =

[ 107.795962] | | | |- freq = , volt =

[ 107.795975] | | | |- freq = , volt =

[ 107.795990] | | |- clock: clk_core current: rate , regu_mode = UNKNOWN, regu_mode_en =

[ 107.796004] -------------DVFS TREE END------------

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