module qin(input clk,output reg beep,input [3:0] col,output [3:0] row_data,output [7:0]out ,input rst_n);wire [3:0] key;wire en;parameter STOP=0, DOD=47708,//262, RED=42516,//294, MD=37876,//330, FAD=35816,//349, SOD=31886,//392, LAD=28408,//440, SID…