reference: JEDS79-3F.pdf , page:181…
example: if DDR is 512MB*16*8 COLBITS = 10,  A0-A9 be used for cloumn address. ORG = 16 ,  each bank's  datas bit 16. pagesize = 1024*16*8 =2k.…
referce :https://blog.csdn.net/ghostyu/article/details/7728106 tRP(RAS Precharge Time): “内存行地址控制器预充电时间” tRCD(RAS-to-CAS Delay)“行寻址至列寻址延迟时间” CL(CAS Latency):“内存读写操作前列地址控制器的潜伏时间” tRAS(RAS Active Time): “内存行有效至预充电的最短周期”…