Apparatus for making legacy network elements transparent to IEEE 1588 Precision Time Protocol operation. Network elements are wrapped by device(s) capable of providing either transparent clock or boundary clock operation. In one embodiment, smart int…
A microprocessor contains an address generation unit, including a segment block, for loading descriptor data and a segment selector in a segment register. Two descriptor loads from a global descriptor table (GDT) and a local descriptor table (LDT) ar…
A method and apparatus for verification of coherence for shared cache components in a system verification environment are provided. With the method and apparatus, stores to the cache are applied to a cache functional simulator in the order that they…
A method and apparatus for executing lock instructions speculatively in an out-of-order processor are disclosed. In one embodiment, a prediction is made whether a given lock instruction will actually be contended. If not, then the lock instruction ma…
A method and apparatus for a atomic operation is described. A method comprises receiving a first program unit in a parallel computing environment, the first program unit including a memory update operation to be performed atomically, the memory updat…
A data processor (104) is described. The data processor (104) is capable of decoding and executing a first instruction (212) of a first instruction set and a second instruction (213-219) in a second instruction set wherein the first instruction (212)…
A computer-implemented method and apparatus in a computer system of processing data generated by a first application program in a second application program during runtime. During runtime, the first application program generates a record including a…
An apparatus comprising a plurality of storage nodes comprising a plurality of corresponding storage disks and configured to store data in a distributed manner between the storage disks that achieves a Redundant Array of Independent Disks-0 (RAID0) l…
Described herein is a method and an apparatus for training a memory signal via an error signal of a memory. The method comprises transmitting from a memory controller a command-address (C/A) signal to a memory module; determining by the memory contro…
An improved memory model and implementation is disclosed. The memory model includes a Total Store Ordering (TSO) and Partial Store Ordering (PSO) memory model to provide a partial order for the memory operations which are issued by multiple processor…
BACKGROUND As recognized in Revision 2.0 of the Intel® Virtualization Technology Specification for the Intel® Itanium® Architecture (VT-I), dated April 2005 (hereinafter "the VT-I Specification"), conventional operating system (OS) designs typic…
ITU-T 建议书 G.1081 IPTV性能监测点 Performance monitoring points for IPTV Summary Successful deployment of IPTV servicesrequires performance parameters to be monitored at a number of different pointsin the complete end to end chain, including the customer pr…
An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a…
A data processing system includes a global promotion facility and a plurality of processors coupled by an interconnect. In response to execution of an acquisition instruction by a first processor among the plurality of processors, the first processor…
BACKGROUND OF THE INVENTION A virtual machine (VM) may be or include a framework or environment created by for example a virtual machine monitor (VMM) on a host system. A VMM may provide facilities or resources on a host environment for an applicatio…
A method for browsing Internet of things (IoT) and an apparatus using the same are provided. In the method for browsing IoT, when a mobile device executes a browser, the browser receives information on IoT devices and displays the IoT devices on a ma…
The present invention relates to the field of security of electronic data and/or communications. In one form, the invention relates to data security and/or privacy in a distributed and/or decentralised network environment. In another form, the invent…
A multiprocessing system having a plurality of processing nodes interconnected by an interconnect network. To optimize performance during spin-lock operations, a home agent prioritizes the servicing of read-to-own (RTO) transaction requests over the…
In one embodiment, a method includes transitioning control to a virtual machine (VM) from a virtual machine monitor (VMM), determining that a VMM timer indicator is set to an enabling value, and identifying a VMM timer value configured by the VMM. Th…
In an embodiment, the present invention describes a method and apparatus for detecting RAW condition earlier in an instruction pipeline. The store instructions are stored in a special store bypass buffer (SBB) within an instruction decode unit (IDU).…
FIELD OF THE INVENTION The present invention relates to a memory device and especially to the interfaces of memory cards. More specifically the present invention relates to Multi Media Cards (MMC) or Secure Digital (SD-) cards. There is a trend that…
BACKGROUND Many computing systems include a network interface card (NIC) to provide for communications with other systems and devices over a network. In a computing system running multiple operating systems (OSs) on multiple virtual machines, each OS…
A network authentication method is to be implemented using a network authentication device and a user end for authenticating the user end. The network authentication method includes the steps of: configuring the network authentication device to store…
BACKGROUND The following disclosure relates to a method and system for enabling a user to browse physical things using a rich user interface (UI) via a web browser in Internet of Things (IoT) such that an end user has rich experience. Internet of Thi…
BACKGROUND The technology described herein relates to methods of and apparatus for using and handling textures, and in particular for carrying out so-called "virtual texturing", in computer graphics systems. It is common in computer graphics sys…
A method, a system, an apparatus, and a computer program product are presented for an authentication process. A host application or system within a distributed data processing system supports one or more controlled resources, such as a legacy applica…
在本节中,您将验证电影控制器生成的编辑方法(Edit action methods)和视图.但是首先将修改点代码,使得发布日期属性(ReleaseDate)看上去更好.打开Models \ Movie.cs文件,并添加高亮行如下所示: using System; using System.ComponentModel.DataAnnotations; using System.Data.Entity; namespace MvcMovie.Models { public class Movie…
Amazon's Dynamo [9] and Facebook's Cassandra [13], relax the consistency model,and offer only eventual consistency. Others such as HBase [1] and BigTable [4] offer strong consistency only for operations touching a single partition, but not across the…
问题:Error:Unable to find method 'com.android.build.gradle.api.BaseVariant.getOutputs()Ljava/util/List;'.Possible causes for this unexpected error include:<ul><li>Gradle's dependency cache may be corrupt (this sometimes occurs after a network co…
BACKGROUND OF THE INVENTION The present invention relates to processors and computer systems. More specifically, the present invention relates to an object-oriented processor architecture and operating method. A conventional central processing unit (…