The prioritization of large memory page mapping is a function of the access bits in the L1 page table. In a first phase of operation, the number of set access bits in each of the L1 page tables is counted periodically and a current count value is cal
A system and method for accessing memory are provided. The system comprises a lookup buffer for storing one or more page table entries, wherein each of the one or more page table entries comprises at least a virtual page number and a physical page nu
A multiprocessor computer system is provided having a multiplicity of sub-systems and a main memory coupled to a system controller. An interconnect module, interconnects the main memory and sub-systems in accordance with interconnect control signals
A global cylinder group (CG) cache is stored in file server memory and shared by a plurality of file systems supported by the file server. The global CG cache comprises a number CG entries which are pre-allocated in memory. As different file systems
BACKGROUND The present disclosure relates to the resource management of virtual machine(s) using hardware address mapping, and, more specifically, to facilitate direct access to devices from virtual machines, utilizing control of hardware address tra
A method and apparatus for preserving memory ordering in a cache coherent link based interconnect in light of partial and non-coherent memory accesses is herein described. In one embodiment, partial memory accesses, such as a partial read, is impleme
BACKGROUND OF THE INVENTION FIG. 1A is a simplified block diagram schematically representing a typical prior art network router 10. Packet forwarding router 10 includes two major subsystems: control plane 12 and data plane 11. Data plane 11 provides
BACKGROUND Electronic devices, such as electronic book readers ("eBook reader devices"), cellular telephones, portable media players, desktop computers, laptops, tablet computers, netbooks, personal digital assistants, and the like, rely on elec
BACKGROUND 1. Field The present invention generally relates to rendering two-dimension representations from three-dimensional scenes, and more particularly to using ray tracing for accelerated rendering of photo-realistic two-dimensional representati
Systems and methods are provided to manage risk associated with access to information within a given organization. The overall risk tolerance for the organization is determined and allocated among a plurality of subjects within the organization. Allo
Virtual addresses from multiple address spaces are translated to real addresses in main memory by generating for each virtual address an address space identifier (AID) identifying its address space. Then, the virtual address and its AID are used to o
A novel massively parallel supercomputer of hundreds of teraOPS-scale includes node architectures based upon System-On-a-Chip technology, i.e., each processing node comprises a single Application Specific Integrated Circuit (ASIC). Within each ASIC n
A file system layout apportions an underlying physical volume into one or more virtual volumes (vvols) of a storage system. The underlying physical volume is an aggregate comprising one or more groups of disks, such as RAID groups, of the storage sys
Apparatus for making legacy network elements transparent to IEEE 1588 Precision Time Protocol operation. Network elements are wrapped by device(s) capable of providing either transparent clock or boundary clock operation. In one embodiment, smart int
A system includes a server and a controller embedded in a device. Both the server and the embedded controller are capable of communicating over a computer network. The embedded controller sends a command to the server over the computer network that i
A process performed on a server includes configuring the server to enable script for a Web service to be defined dynamically, where the Web service includes an application program interface (API) for enabling access by, and interaction with, a comput
A method implemented by a network device residing in a service domain, wherein the network device comprises an information centric networking (ICN) transport layer and a service access layer (SAL) for handling context-aware service logistics and serv
One embodiment of the present invention provides a store queue that applies the stores to a memory subsystem in program order. This store queue includes a content-addressable memory (CAM), which holds pending stores and facilitates looking up stores
